• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.3
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• pp.161-168
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• 2019

This study introduces a new topology to decrease the voltage stress experienced by a 13.56 MHz electrical variable capacitor (EVC) circuit with an asymmetrical switch structure applied to the impedance matching circuit of a radio frequency (RF) plasma system. The method adopts a symmetrical switch structure instead of an asymmetrical one in each of the capacitor's leg in the EVC circuit. The proposed topology successfully reduces voltage stress in the EVC circuit due to the symmetrical charging and discharging mode. This topology can also be applied to the impedance matching circuit of a high-power and high-frequency RF etching system. The target features of the proposed circuit topology are investigated via simulation and experiment. Voltage stress on the switch of the EVC circuit is successfully reduced by more than 40%.

• Korean Journal of Materials Research
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• v.17 no.2
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• pp.81-85
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• 2007

Embedded capacitor technology can improve electrical perfomance and reduce assembly cost compared with traditional discrete capacitor technology. To improve the capacitance density of the $Al_2O_3$ based embedded capacitor on Cu cladded fiber reinforced plastics (FR-4), the specific surface area of the $Al_2O_3$ thin films was enlarged and their surface morphologies were controlled by anodization process parameters. From I-V characteristics, it was found that breakdown voltage and leakage current were 23 V and $1{\times}10^{-6}A/cm^2$ at 3.3 V, respectively. We have also measured C-V characteristics of $Pt/Al_2O_3/Al/Ti$ structure on CU/FR4. The capacitance density was $300nF/cm^2$ and the dielectric loss was 0.04. This nano-porous $Al_2O_3$ is a good material candidate for the embedded capacitor application for electronic products.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.5
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• pp.203-210
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• 2003

This paper describes high voltage and high energy density capacitor developed for pulsed power applications. The rated voltage of the developed capacitor is DC 22 [kV], the capacitance is 206 [$\mu$F] and the energy density is about 0.7 [kJ/kg]. Polypropylene film and kraft paper were used as the dielectrics. The ratio of the thickness of each dielectric material which consists of the composite dielectric structure, stacking factor and the termination method were determined by the charging and discharging tests on model capacitors. In terms of energy density, the developed capacitor has higher energy density compared with the products of foreign leading companies. In addition, it has been proved that the life expectancy can be more over 2000 shots through the charging and discharging test. The voltage reversal factor was 20%. This capacitor can be used as numerous discharge applications such as military, medical, industrial fields.

• KIEE International Transactions on Electrophysics and Applications
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• v.2C no.6
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• pp.292-296
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• 2002

A new sustain driving method for the AC PDP is presented. In this driving method, the voltage source is connected to a storage capacitor, this storage capacitor charges an intermediate capacitor through LC resonance, and the panel is charged from the intermediate capacitor indirectly. In this way, the current flowing into the AC PDP when the sustain discharge occurs is reduced because the current is indirectly supplied from a capacitor, a limited source of charge. Thus, the input power to the output luminance efficiency is improved. Since the voltage supplied to the storage capacitor is doubled through LC resonance, this method call drive an AC PDP with a voltage source of about half of the voltage necessary in the conventional driving methods. The experiments showed that this charge-controlled driving method could drive ail AC PDP with a voltage source of as low as 107V. Using a panel of the conventional structure, luminous efficiency of 1.28 lm/W was achieved.

• Journal of Power Electronics
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• v.16 no.1
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• pp.133-141
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• 2016

This paper focuses on the development of a Five-Level Flying-Capacitor Dual Buck Inverter (FLFCDBI) based on the main circuit of dual buck inverters. This topology has been described as not having any shoot-through problems, no body-diode reverse recovery problems and the half-cycle work mode found in the traditional Multi-Level Flying-Capacitor Inverter (MLFCI). It has been shown that the flying-capacitor voltages of this inverter can be regulated by the redundant state selection within one pole. The voltage balance of the flying-capacitors can be achieved by charging or discharging in the positive (negative) half cycles by choosing the proper logical algorithms. This system has a simple structure but demonstrates improved performance and reliability. The validity of this inverter is conformed through computer-aided simulation and experimental investigations.

• Corrosion Science and Technology
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• v.2 no.5
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• pp.243-246
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• 2003

We have used a plasma etching method in order to develop a concave-type Pt electrode capacitor to overcome the limitation of conventional stack-type capacitor in a small critical-dimension (CD) pattern. We have deposited Pt layer on the concave-type structure made by patterning of $SiO_2$ and subsequently we separated the adjacent nodes by etch-back process with photoresist (PR) as a protecting layer.

• Korean Chemical Engineering Research
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• v.52 no.1
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• pp.52-57
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• 2014

The MCMB-$Li_4Ti_5O_{12}$ with core-shell structure was prepared by sol-gel process to improve low cycle capability of MCMB in this study. The electrochemical characteristics were investigated for hybrid capacitor using MCMB-$Li_4Ti_5O_{12}$ as the negative electrode and $LiMn_2O_4$, Active carbon fiber as the positive electrode. The electrochemical behaviors of hybrid capacitor using organic electrolytes ($LiPF_6$, EC/DMC/EMC) were characterized by charge/discharge, cyclic voltammetry, cycle and impedance tests. The hybrid capacitor using MCMB-$Li_4Ti_5O_{12}/LiMn_2O_4$ electrodes had better capacitance than MCMB hybrid systems and was able to deliver a specific energy with 67 Wh/kg at a specific power of 781 W/kg.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.4
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• pp.49-53
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• 1999

In this study, the characteristics of the structure of buried type capacitor for RF multi- chip-module are investigated. We developed many kinds of structures to minimize the space of capacitor in module and the value of parastic series inductance without any loss in capacitance, and in this procedure the effect of vias especially position, size, number length are analyzed and optimized. This characteristics of structures are checked through HFSS(high frequency structure simulator) of HP, and the value of parastic series inductance is calculated by equivalent circuit analysis. And ensuing the result of simulation, we made buried type capacitors using LTCC (low temperature cofired ceramic) material. In measurement of this sample, we found out the effective and precise method can be applied to buried type and characteristics of vias and striplines added for measuring are quantified.

• Proceedings of the KIPE Conference
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• 2003.07a
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• pp.291-293
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• 2003

A semiconductor switch-based fast hi-polar high voltage pulse generator is proposed in this paper The proposed pulse system is made of a thyristor based-rectifier, DC link capacitor, a push-pull resonant inverter, a high voltage transformer. secondary capacitor, a high voltage IGBT & diode stacks, and a variable capacitor. The proposed system makes hi-polar high voltage sinusoidal waveform using resonance between leakage inductance of the transformer and secondary capacitor and transfers energy to output load at maximum of the secondary capacitor voltage. Compared to previous hi-polar high voltage pulse power supply using nonlinear transmission line, the proposed pulse power system using only semiconductor switches has simple structure and gives high efficiency

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.2
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• pp.76-82
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• 2003

The robust stack storage node and sufficient cell capacitance for high performance is indispensable for 90 nm DRAM capacitor. For the first time, we successfully demonstrated MIS capacitor process integration for 90 nm DRAM technology. Novel cell layout and integration technology of 90 nm DRAM capacitor is proposed and developed, and it can be extended to the next generation DRAM. Diamond-shaped OCS with 1.8 um stack height is newly developed for large capacitor area with better stability. Furthermore, the novel $Al_2O_3/HfO_2$ dielectric material with equivalent oxide thickness (EOT) of 25 ${\AA}$ is adopted for obtaining sufficient cell capacitance. The reliable cell capacitance and leakage current of MIS capacitor is obtained with ~26 fF/cell and < 1 fA/ceil by $Al_2O_3/HfO_2$ dielectric material, respectively.