• Title/Summary/Keyword: Capacitance coupling

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Estimation of Short Circuit Power in Static CMOS Circuits (정적 CMOS 회로의 단락 소모 전력 예측 기법)

  • Baek, Jong-Humn;Jung, Seung-Ho;Kim, Seok-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.11
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    • pp.96-104
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    • 2000
  • This paper presents a simple method to estimate short-circuit power dissipation for static CMOS logic circuits. Short-circuit current expression is derived by accurately interpolating peak points of actual current curves which is influenced by the gate-to-drain coupling capacitance. It is shown through simulations that the proposed technique yields better accuracy than previous methods when signal transition time and/or load capacitance decreases, which is a characteristic of the present technological evolution. The proposed analytical expressions can be easily applied in such applications as power estimation even when the current expression is changed.

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6-GHz-to-18-GHz AlGaN/GaN Cascaded Nonuniform Distributed Power Amplifier MMIC Using Load Modulation of Increased Series Gate Capacitance

  • Shin, Dong-Hwan;Yom, In-Bok;Kim, Dong-Wook
    • ETRI Journal
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    • v.39 no.5
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    • pp.737-745
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    • 2017
  • A 6-GHz-to-18-GHz monolithic nonuniform distributed power amplifier has been designed using the load modulation of increased series gate capacitance. This amplifier was implemented using a $0.25-{\mu}m$ AlGaN/GaN HEMT process on a SiC substrate. With the proposed load modulation, we enhanced the amplifier's simulated performance by 4.8 dB in output power, and by 13.1% in power-added efficiency (PAE) at the upper limit of the bandwidth, compared with an amplifier with uniform gate coupling capacitors. Under the pulse-mode condition of a $100-{\mu}s$ pulse period and a 10% duty cycle, the fabricated power amplifier showed a saturated output power of 39.5 dBm (9 W) to 40.4 dBm (11 W) with an associated PAE of 17% to 22%, and input/output return losses of more than 10 dB within 6 GHz to 18 GHz.

Experimental Characterization-Based Signal Integrity Verification of Sub-Micron VLSI Interconnects

  • Eo, Yung-Seon;Park, Young-Jun;Kim, Yong-Ju;Jeong, Ju-Young;Kwon, Oh-Kyong
    • Journal of Electrical Engineering and information Science
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    • v.2 no.5
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    • pp.17-26
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    • 1997
  • Interconnect characterization on a wafer level was performed. Test patterns for single, two-coupled, and triple-coupled lines ere designed by using 0.5$\mu\textrm{m}$ CMOS process. Then interconnect capacitances and resistances were experimentally extracted by using tow port network measurements, Particularly to eliminate parasitic effects, the Y-parameter de-embedding was performed with specially designed de-embedding patterns. Also, for the purpose of comparisons, capacitance matrices were calculated by using the existing CAD model and field-solver-based commercial simulator, METAL and MEDICI. This work experimentally verifies that existing CAD models or parameter extraction may have large deviation from real values. The signal transient simulation with the experimental data and other methodologies such as field-solver-based simulation and existing model was performed. as expected, the significantly affect on the signal delay and crosstalk. The signal delay due to interconnects dominates the sub-micron-based a gate delay (e.g., inverter). Particularly, coupling capacitance deviation is so large (about more than 45% in the worst case) that signal integrity cannot e guaranteed with the existing methodologies. The characterization methodologies of this paper can be very usefully employed for the signal integrity verification or he electrical design rule establishments of IC interconnects in the industry.

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Study of the Wearable Electrocardiogram Measuring System using Capacitive-coupled Electrode (정전 용량성 결합 전극을 이용한 웨어러블 심전도 측정 시스템 설계에 관한 연구)

  • Lee, Jae-Ho;Lee, Young-Jae;Lee, Kang-Hwi;Kang, Seng-Jin;Kim, Kyeung-Nam;Park, Hee-Jung;Lee, Jeong-Whan
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.63 no.10
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    • pp.1448-1454
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    • 2014
  • In this study, a new type of electrode device is implemented to measure the capacitance energy and interpret it as the ECG (Electrocardiogram) data. The main idea of this new electrode system is to estimate the capacitance on the skin by assembling a capacitive-coupled circuits and translate into the ECG signal. To measure the coupling energy and estimate the aquired data in terms of heart activity, the capacitive-coupled electrode is garmented with fabrics in the form of a chest band or a vest jacket. To compare the ECG data from the capacitive-coupled electrode with the conventional electrode(Ag-AgCl) system, the corelation coefficient between two signals is computed as 0.9517. Thus, we can conclude the fact that capacitive-coupled electrode system can measure a person's heart activity without any contact to his or her skin and can the interpreted as the ECG data.

High Voltage Transformer Design using Self-Resonant Characteristics of Transformer (트랜스포머의 자가공진 특성을 이용한 고전압 트랜스포머 설계)

  • Lee, Sueng-Hwan;Cho, Dae-Kweon
    • Journal of IKEEE
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    • v.18 no.1
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    • pp.31-36
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    • 2014
  • In this paper, self-resonant characteristics of transformers were analyzed in accordance with changes of characteristics regarding to the stray capacitance, the volume of winding and the winding ratio were organized by formulas. Generally, the stray capacitance is considered as an unnecessary factor in processing transformers design as well as one of the inherent characteristics. In particular, these characteristics can be appeared clearly in the high frequency driving and Electrical resonance occurs in transformer, according to coupling with a magnetic factor at a particular frequency. In the case of high-voltage output applications, such as medical equipments, It is required to output high-voltage gain. Therefor, If Self-Resonant Characteristic is applied to High-Voltage transformer design, Not only the transformer and circuit but also related the system size can be reduced. So we propose it as one of additional high voltage transformer design methods.

Reactive Ion Etching and Magnetically Enhanced Reactive Ion Etching Process of Low-K Methylsilsequioxane Insulator Film using $CF_4$ and $O_2$ ($CF_4$$O_2$를 이용한 저유전율 물질인 Methylsilsequioxane의 RIE와 MERIE 공정)

  • Jung, Do-Hyun;Lee, Yong-Soo;Lee, Kil-Hun;Kim, Kwang-Hun;Lee, Hee-Woo;Choi, Jong-Sun
    • Proceedings of the KIEE Conference
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    • 2000.07c
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    • pp.1491-1493
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    • 2000
  • Continuing improvement of microprocessor performance involves in the device size. This allow greater device speed, an increase in device packing density, and an increase in the number of functions that can reside on a single chip. However this has led to propagation delay, crosstalk noise, and power dissipation due to resistance-capacitance(RC) coupling become significant due to increased wiring capacitance, especially interline capacitance between the metal lines on the same metal level. So, MSSQ which has the permittivity between 2.5-3.2 is used to prevent from these problems. For pattering MSSQ(Methylsilsequioxane), we use RIE(Reactive Ion Etching) and MERIE(Magnetically enhanced Reactive Ion Etching) which could provide good anisotropic etching. In this study, we optimized the flow rate of $CF_{4}/O_2$ gas, RF power to obtain the best etching rate and roughness and also analyzed the etching result using $\alpha$-step profilemeter, SEM, infrared spectrum and AFM.

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Capacitive Parameter Estimation of Passive Telemetry RF Sensor System Using RLS Algorithm (RLS 알고리즘을 이용한 원격 RF 센서 시스템의 정전용량 파라메타 추정)

  • Kim, Kyung-Yup;Lee, John-Tark
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.5
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    • pp.858-865
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    • 2008
  • In this paper, Capacitive Telemetry RF Sensor System using Recursive Least Square (RLS) algorithm was proposed. General Telemetry RF Sensor System means that it should be "wireless", "implantable" and "batterless". Conventional Telemetry RF Sensor System adopts Integrated Circuit type, but there are many defects like complexity of structure and the limitation of large power consumption in some cases. In order to overcome these disadvantages, Telemetry RF Sensor System based on inductive coupling principle was proposed in this paper. Proposed Telemetry RF Sensor System is very simple because it consists of R, L and C and measures the changes of environment like pressure and humidity in the type of capacitive value. This system adopted RLS algorithm for estimation of this capacitive parameter. For the purpose of applying RLS algorithm, proposed system was mathematically modelled with phasor method and was quasi-linearized. As two parameters such as phase and amplitude of output voltage for estimation were needed, Phase Difference Detector and Amplitude Detector were proposed respectively which were implemented using TMS320C2812 made by Texas Instrument. Finally, It is verified that the capacitance of proposed telemetry RF Sensor System using RLS algorithm can be estimated efficiently under noisy environment.

8-port Coupled Transmission Line Modeling of KSATR ICRF Antenna and Comparison with Measurement (커플링이 고려된 KSTAR ICRF 안테나의 8포트 전송선 회로 모델링 및 측정 결과 비교)

  • Kim, S.H.;Wang, S.J.;Hwang, C.K.;Kwak, J.G.
    • Journal of the Korean Vacuum Society
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    • v.19 no.1
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    • pp.72-80
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    • 2010
  • It is very important to predict and analyze the change of voltage and current distribution of current strap, abnormal voltage distribution of transmission line and resonance phenomenon by coupling between current straps for more stable operation of ICRF system. In this study, to understand those phenomena by coupling, 8-port coupled transmission line model is completed by appling S-parameter measured in the prototype KSTAR ICRF antenna to the model. The determined self-inductance, mutual-inductance and capacitance of antenna straps are shown to be lower than that calculated from 2D approximate model due to finite length of strap. The coupled transmission line model of current strap will be utilized to the operation of ICRF system of KSTAR in the future.

A Study on the Design of the Directional Coupler using Three Layer Microstrip Substrate (세 층 마이크로스트립 유전체 기판을 이용한 방향성 결합기 설계에 관한 연구)

  • 천동완;김원기;박정훈;김상태;신철재
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.4
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    • pp.513-520
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    • 2001
  • In this paper, the directional coupler using three layer microstrip substrate is proposed and the design method is notified. Modified re-entrant mode coupler is the proposed structure that one layer is added on upper plane of coupled transmission lines and the floating conductor is placed on added layer's upper planes. This structure has high coupling for the increase of odd mode capacitance and also has good performance in VSWR, isolation, phase difference because the difference of effective permittivity is small in each mode. We have designed the coupler from the calculation of impedance, effective permittivity, coupling coefficient using even, odd mode analysis method. From the simulation and measurement, proposed coupler has about 2 dB more tighter coupling than conventional coupler and also has good performance in VSWR, isolation, phase difference.

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RF Capacitive Coupling Link for 3-D ICs (3-D 집적회로용 RF 커패시티브 결합 링크)

  • Choi, Chan-Ki;Cui, Chenglin;Kim, Seong-Kyun;Kim, Byung-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.10
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    • pp.964-970
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    • 2013
  • This paper presents a bandpass wireless 3-D chip to chip interface technique. The proposed technique uses direct amplitude modulation of the free running oscillator which especially utilizes the coupling capacitance between two stacked chips as a part of the resonator. Therefore, the oscillator is three dimensionally configured and a simple envelope detector can be used as a receiver without any additional matching circuitry. The proposed link was designed and fabricated using 110 nm CMOS technology and experimental results successfully showed the data transmission at a data rate of 2 Gb/s for the stacked chips with a thickness of 50 ${\mu}m$ consuming 4.32 mW. The sizes of the Tx and Rx chips are 0.045 $mm^2$ and 0.029 $mm^2$, respectively.