• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.61 no.6
• /
• pp.817-820
• /
• 2012

We studied p-type capacitance characteristics of ZnO thin-film transistors (TFT's), grown by metal organic chemical vapor deposition (MOCVD). We compared two ZnO TFT's: one grown at $450^{\circ}C$ and the other grown at $350^{\circ}C$. ZnO grown at $450^{\circ}C$ showed smooth capacitance profile with electron density of $1.5{\times}10^{20}cm^{-3}$. In contrast, ZnO grown at $350^{\circ}C$ showed a capacitance jump when gate voltage was changed to negative voltages. Current-voltage characteristics measured in the two samples did not show much difference. We explain that the capacitance jump is related to p-type ZnO layer formed at the $SiO_2$ interface. Current-voltage and capacitance-voltage data support that p-type characteristics are observed only when background electron density is very low.

• Journal of information and communication convergence engineering
• /
• v.19 no.4
• /
• pp.263-268
• /
• 2021

Although the compact capacitance model of point tunneling types of tunneling field-effect transistors (TFET) has been proposed, those of line tunneling types of TFETs have not been reported. In this study, a compact capacitance model of an L-shaped TFET (LTFET), a line tunneling type of TFET, is proposed using the previously developed surface potentials and current models of P- and L-type LTFETs. The Verilog-A LTFET model for simulation program with integrated circuit emphasis (SPICE) was also developed to verify the validation of the compact LTFET model including the capacitance model. The SPICE simulation results using the Verilog-A LTFET were compared to those obtained using a technology computer-aided-design (TCAD) device simulator. The current-voltage characteristics and capacitance-voltage characteristics of N and P-LTFETs were consistent for all operational bias. The voltage transfer characteristics and transient response of the inverter circuit comprising N and P-LTFETs in series were verified with the TCAD mixed-mode simulation results.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1996.05a
• /
• pp.102-104
• /
• 1996

The fabrication and analytical expression for the temperature dependent capacitance characteristics of inverted staggered hydrogenerated amorphous silicon thin film transistors(a-si :H TFT) from 303k to 363k were presented. The results show that the experimental capacitance-voltage characteristics at several temperatures are easily measured. Capacitance increased exponentially by gate voltage increase and decreased by temperature increase. C/C(max) ratio decreased at higher temperature, C/C(min) ratio increased at higher temperature.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2008.10a
• /
• pp.228-230
• /
• 2008

The response time characteristic of low voltage liquid crystals (LCs) is investigated and a new simulator for low voltage LCs is proposed. In order to enable low voltage operation, it is important to minimize Vth of LCs and variation of pixel voltage caused by dynamic capacitance operation of LC Display. Because dynamic capacitance variation is much larger for low voltage LC operation compared to that of conventional LC material, it is necessary to make a better model for dynamic capacitance operation. A proposed minimizing Vth of LCs and variation of pixel voltage study results through a new constant charge model improve response characteristics for low voltage LCs operation.

• Journal of Power Electronics
• /
• v.16 no.1
• /
• pp.66-73
• /
• 2016

The quantity of alternating current (AC) leakage and the value of distortion factor in capacitor currents are discussed with regard to a new power component called variable capacitance device (VCD). This component has terminals for controlling its capacitance. Nonlinear dielectric characteristics are utilized in this device to vary the capacitance. When VCD operates in an AC circuit, the AC leakage from this device through direct current (DC) control voltage source increases according to the conditions of DC control voltage and so on. To solve this problem, we propose techniques for suppressing AC leakage. Although VCD has strong nonlinear characteristics, the current through the capacitor is not distorted significantly. The relations between AC leakage and the distortion in current waveforms are investigated. An application example for an AC power regulator is also introduced to evaluate the distortion in waveforms.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2006.06a
• /
• pp.148-149
• /
• 2006

Capacitance-voltage(C-V) 측정평가를 통하여 ZnO/GaN 이종접합구조의 전기적인 특성을 조사한다. 실온에서 10kHz의 주파수에서 얻은 ZnO/GaN의 이종접합구조에 대한 C-V 측정결과는 이종접합계면에서 고밀도의 전자가 축적되어 있음을 나타낸다. 이것은 ZnO/GaN 이종접합계면의 다른 재료에서 볼 수 없는 큰 전도대불연속에 기인한 것인데, 각각의 층의 전도도을 제어함으로 이종접합계면에 축적되는 전자밀도를 ${\sim}10^{19}cm^{-3}$까지 증가시킬 수 있다. 따라서 ZnO/GaN 이종접합구조는 이종접합(合)트래지스터로서 유망한 재료로 판단된다.

• Journal of Power Electronics
• /
• v.13 no.3
• /
• pp.329-338
• /
• 2013

In this paper, the charging characteristics of series resonant type high voltage capacitor chargers considering the transformer stray capacitance have been studied. The principles of operation for the four operational modes and the mode changes for the four different switching frequency sections are explained and analyzed in the range of switching frequency below the resonant frequency. It is confirmed that the average charging currents derived from the above analysis results have non-linear characteristics in each of the four modes. The resonant current, resonant voltage, charging current, and charging time of this capacitor charger as variations of the switching frequency, series parallel capacitance ratio ($k=C_p/C_s$), and output voltage are calculated. From the calculation results, the advantages and disadvantages arising from the parallel connection of this stray capacitance are described. Some methods to minimize charging time of this capacitor charger are suggested. In addition, the results of a comparative test using two transformers whose stray capacitances are different are described. A 1.8 kJ/s prototype capacitor charger is assembled with a TI28335 DSP controller and a 40 kJ, 7 kV capacitor. The analysis results are verified by the experiment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1999.05a
• /
• pp.395-398
• /
• 1999

In ac PDP(plasma Display Panel), the discharge characteristics is very important to display clear images. In this paper, we have studied the measurement of voltage transfer curves which show the discharge characteristics in AC PDP. The change of the effective wall capacitance during a discharge is also studied. These depend on lateral spreading of charge distribution and the strength of the discharge. As a parameter of the frequency, we observed the effects of the frequency in voltage transfer curves and in effective wall capacitance changes. As frequency increases, minimum sustain voltage and firing voltage decrease. In upper region of gap voltage the chance of the effective wall capacitance is independent of frequency.

• Transactions on Electrical and Electronic Materials
• /
• v.17 no.5
• /
• pp.293-296
• /
• 2016

Using capacitance-voltage (C-V) and conductance-voltage (G/ω-V) measurements, the electrical properties of Cu/n-InP Schottky diodes were investigated. The values of C and G/ω were found to decrease with increasing frequency. The presence of interface states might cause excess capacitance, leading to frequency dispersion. The negative capacitance was observed under a forward bias voltage, which may be due to contact injection, interface states or minority-carrier injection. The barrier heights from C-V measurements were found to depend on the frequency. In particular, the barrier height at 200 kHz was found to be 0.65 eV, which was similar to the flat band barrier height of 0.66 eV.

• ETRI Journal
• /
• v.32 no.1
• /
• pp.68-72
• /
• 2010

The coupling between the transverse and longitudinal components of the channel electron motion in NMOS devices leads to a reduction in the barrier height. Therefore, this study theoretically investigates the effects of the in-plane velocity of channel electrons on the capacitance-voltage characteristics of nano NMOS devices under inversion bias. Numerical calculation via a self-consistent solution to the coupled Schrodinger equation and Poisson equation is used in the investigation. The results demonstrate that such a coupling largely affects capacitance-voltage characteristic when the in-plane velocity of channel electrons is high. The ballistic transport ensures a high in-plane momentum. It suggests that such a coupling should be considered in the quantum capacitance-voltage modeling in ballistic transport devices.