• Title/Summary/Keyword: CMP stacking

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Ti/Cu CMP process for wafer level 3D integration (웨이퍼 레벨 3D Integration을 위한 Ti/Cu CMP 공정 연구)

  • Kim, Eunsol;Lee, Minjae;Kim, Sungdong;Kim, Sarah Eunkyung
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.3
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    • pp.37-41
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    • 2012
  • The wafer level stacking with Cu-to-Cu bonding becomes an important technology for high density DRAM stacking, high performance logic stacking, or heterogeneous chip stacking. Cu CMP becomes one of key processes to be developed for optimized Cu bonding process. For the ultra low-k dielectrics used in the advanced logic applications, Ti barrier has been preferred due to its good compatibility with porous ultra low-K dielectrics. But since Ti is electrochemically reactive to Cu CMP slurries, it leads to a new challenge to Cu CMP. In this study Ti barrier/Cu interconnection structure has been investigated for the wafer level 3D integration. Cu CMP wafers have been fabricated by a damascene process and two types of slurry were compared. The slurry selectivity to $SiO_2$ and Ti and removal rate were measured. The effect of metal line width and metal density were evaluated.

Development of Cu CMP process for Cu-to-Cu wafer stacking (Cu-to-Cu 웨이퍼 적층을 위한 Cu CMP 특성 분석)

  • Song, Inhyeop;Lee, Minjae;Kim, Sungdong;Kim, Sarah Eunkyung
    • Journal of the Microelectronics and Packaging Society
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    • v.20 no.4
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    • pp.81-85
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    • 2013
  • Wafer stacking technology becomes more important for the next generation IC technology. It requires new process development such as TSV, wafer bonding, and wafer thinning and also needs to resolve wafer warpage, power delivery, and thermo-mechanical reliability for high volume manufacturing. In this study, Cu CMP which is the key process for wafer bonding has been studied using Cu CMP and oxide CMP processes. Wafer samples were fabricated on 8" Si wafer using a damascene process. Cu dishing after Cu CMP and oxide CMP was $180{\AA}$ in average and the total height from wafer surface to bump surface was approximately $2000{\AA}$.

Robust and Optimum Weighted Stacking of Seismic Data (탄성파 자료의 강인한 최적 가중 겹쌓기)

  • Ji, Jun
    • Geophysics and Geophysical Exploration
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    • v.16 no.1
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    • pp.1-5
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    • 2013
  • Stacking in seismic processing plays an important role in improving signal-to-noise ratio and imaging quality of seismic data. However, the conventional stacking method doesn't remove random noises with various distributions and outliers up to a satisfactory level. This paper introduces a robust and optimum weighted stack method which shows both robustness to outlier noises and optimum in removing random noises. This was achieved by combining the robust median stacking with the optimum weighted stacking using local correlation. Application of the method to synthetic data showed that the proposed method is very effective in suppressing random noises with various distributions including outliers.

A Study on Dip-Moveout of Seismic Reflection Data (탄성파반자료자료의 경사보정 연구)

  • 양승진
    • Economic and Environmental Geology
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    • v.32 no.5
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    • pp.495-502
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    • 1999
  • Common-mid-point (CMP) seismic data on a dipping layer have have a stacking different from a horizontal layer velocity and the reflection points on data are dispersed to many positions. Therefore, the CMP data are not stacked well by the conventional stacking method using the horizontal layer velocity. The CMP gather can ideally stacked by applying dip-moveout(DMO) processing. Hence, modern seismic processing indludes DMO as an essential routine step. DMO processing techniques are broadly categorized by two, Fourier transform and integral methods, each of which has many different computational schemes. In this study, the dip-decomposition technique of the Fourier transform method is used to test the DMO effect on the synthetic scismic data generated for dipping structures. Each of constnat offset sections NMO corrected by using the layer velocity of the model and DMO processed. The resulting zero-offset sections for many offsets are stacked. The stacked sections with DMO processing show the structural boundaries of the models much better than those without DMO processing.

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Cu/SiO2 CMP Process for Wafer Level Cu Bonding (웨이퍼 레벨 Cu 본딩을 위한 Cu/SiO2 CMP 공정 연구)

  • Lee, Minjae;Kim, Sarah Eunkyung;Kim, Sungdong
    • Journal of the Microelectronics and Packaging Society
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    • v.20 no.2
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    • pp.47-51
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    • 2013
  • Chemical mechanical polishing (CMP) has become one of the key processes in wafer level stacking technology for 3D stacked IC. In this study, two-step CMP process was proposed to polish $Cu/SiO_2$ hybrid bonding surface, that is, Cu CMP was followed by $SiO_2$ CMP to minimize Cu dishing. As a result, Cu dishing was reduced down to $100{\sim}200{\AA}$ after $SiO_2$ CMP and surface roughness was also improved. The bonding interface showed no noticeable dishing or interface line, implying high bonding strength.

Fabrication and Challenges of Cu-to-Cu Wafer Bonding

  • Kang, Sung-Geun;Lee, Ji-Eun;Kim, Eun-Sol;Lim, Na-Eun;Kim, Soo-Hyung;Kim, Sung-Dong;Kim, Sarah Eun-Kyung
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.2
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    • pp.29-33
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    • 2012
  • The demand for 3D wafer level integration has been increasing significantly. Although many technical challenges of wafer stacking are still remaining, wafer stacking is a key technology for 3D integration due to a high volume manufacturing, smaller package size, low cost, and no need for known good die. Among several new process techniques Cu-to-Cu wafer bonding is the key process to be optimized for the high density and high performance IC manufacturing. In this study two main challenges for Cu-to-Cu wafer bonding were evaluated: misalignment and bond quality of bonded wafers. It is demonstrated that the misalignment in a bonded wafer was mainly due to a physical movement of spacer removal step and the bond quality was significantly dependent on Cu bump dishing and oxide erosion by Cu CMP.

Fabrication of Through-hole Interconnect in Si Wafer for 3D Package (3D 패키지용 관통 전극 형성에 관한 연구)

  • Kim, Dae-Gon;Kim, Jong-Woong;Ha, Sang-Su;Jung, Jae-Pil;Shin, Young-Eui;Moon, Jeong-Hoon;Jung, Seung-Boo
    • Journal of Welding and Joining
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    • v.24 no.2
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    • pp.64-70
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    • 2006
  • The 3-dimensional (3D) chip stacking technology is a leading technology to realize a high density and high performance system in package (SiP). There are several kinds of methods for chip stacking, but the stacking and interconnection through Cu filled through-hole via is considered to be one of the most advanced stacking technologies. Therefore, we studied the optimum process of through-hole via formation and Cu filling process for Si wafer stacking. Through-hole via was formed with DRIE (Deep Reactive ion Etching) and Cu filling was realized with the electroplating method. The optimized conditions for the via formation were RE coil power of 200 W, etch/passivation cycle time of 6.5 : 6 s and SF6 : C4F8 gas flow rate of 260 : 100 sccm. The reverse pulsed current of 1.5 A/dm2 was the most favorable condition for the Cu electroplating in the via. The Cu filled Si wafer was chemically and mechanically polished (CMP) for the following flip chip bumping technology.

Study of Several Silica Properties Influence on Sapphire CMP

  • Wang, Haibo;Zhang, Zhongxiang;Lu, Shibin
    • Journal of Electrical Engineering and Technology
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    • v.13 no.2
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    • pp.886-891
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    • 2018
  • Colloid silica using as abrasive for polishing sapphire has been extensively studied, which mechanism has also been deeply discussed. However, by the requirement of application enlargement and cost reduction, some new problems appear such as silica service life time, particle diameter mixing, etc. In this paper, several influences of colloid silica usage on sapphire CMP are examined. Results show particle diameter and concentration, pH value, service life time, particle diameter mixing heavily influence removal rate. Further analysis discloses there are two main effect aspects which are quantity of hydroxyl group, contact area for abrasive density stacking between abrasive and sapphire. Based on the discussions, a dynamic process of sapphire polishing is proposed.

Enhancement of Seismic Stacking Energy with Crossdip Correction for Crooked Survey Lines

  • Kim, Ji Soo;Lee, Sun Jung;Seo, Yong Seok;Ju, Hyeon Tae
    • The Journal of Engineering Geology
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    • v.24 no.2
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    • pp.171-178
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    • 2014
  • In seismic reflection data processing, the crossdip correction effectively focuses the stacking energy near the sharp bends of a crooked survey line. Additionally, approximate 3-D information on the reflector (e.g., true crossdip angle and lateral continuity) are locally investigated as a by-product of the crossdip correction procedure. Improvement of the signal-to-noise ratio and estimation of reflector crossdip attitude are tested, in terms of both common midpoint bin direction and processing-line type, using synthetic seismic reflection data. To effectively image the reflection energy near bends in seismic survey lines, straight-line binning is preferred to slalom-line binning.

High-resolution shallow marine seismic survey using an air gun and 6 channel streamer (에어건과 6채널 스트리머를 이용한 고해상 천부 해저 탄성파탐사)

  • Lee Ho-Young;Park Keun-Pil;Koo Nam-Hyung;Park Young-Soo;Kim Young-Gun;Seo Gab-Seok;Kang Dong-Hyo;Hwang Kyu-Duk;Kim Jong-Chon
    • 한국지구물리탐사학회:학술대회논문집
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    • 2002.09a
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    • pp.24-45
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    • 2002
  • For the last several decades, high-resolution shallow marine seismic technique has been used for various resources, engineering and geological surveys. Even though the multichannel method is powerful to image subsurface structures, single channel analog survey has been more frequently employed in shallow water exploration, because it is more expedient and economical. To improve the quality of the high-resolution seismic data economically, we acquired digital seismic data using a small air gun, 6 channel streamer and PC-based system, performed data processing and produced high-resolution seismic sections. For many years, such test acquisitions were performed with other studies which have different purposes in the area of off Pohang, Yellow Sea and Gyeonggi-bay. Basic data processing was applied to the acquired data and the processing sequence included gain recovery, deconvolution, filtering, normal moveout, static corrections, CMP gathering and stacking. Examples of digitally processed sections were shown and compared with analog sections. Digital seismic sections have a much higher resolution after data processing. The results of acquisition and processing show that the high-resolution shallow marine seismic surveys using a small air gun, 6 channel streamer and PC-based system may be an effective way to image shallow subsurface structures precisely.

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