• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.12
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• pp.40-48
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• 2013

This paper presents multi-channel transimpedance amplifier(TIA) arrays in short-range LADAR systems for unmanned vehicles, by using a 0.18um CMOS technology. Two $4{\times}4$ channel TIA arrays including a voltage-mode INV-TIA and a current-mode CG-TIA are introduced. First, the INV-TIA consists of a inverter stage with a feedback resistor and a CML output buffer with virtual ground so as to achieve low noise, low power, easy current control for gain and impedance. Second, the CG-TIA utilizes a bias from on-chip bandgap reference and exploits a source-follower for high-frequency peaking, yielding 1.26 times smaller chip area per channel than INV-TIA. Post-layout simulations demonstrate that the INV-TIA achieves 57.5-dB${\Omega}$ transimpedance gain, 340-MHz bandwidth, 3.7-pA/sqrt(Hz) average noise current spectral density, and 2.84mW power dissipation, whereas the CG-TIA obtains 54.5-dB${\Omega}$ transimpedance gain, 360-MHz bandwidth, 9.17-pA/sqrt(Hz) average noise current spectral density, and 4.24mW power dissipation. Yet, the pulse simulations reveal that the CG-TIA array shows better output pulses in the range of 200-500-Mb/s operations.

• Journal of IKEEE
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• v.26 no.1
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• pp.111-118
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• 2022

In this paper, we studied 4H-SiC CMOS that can be integrated with high-voltage SiC power devices. After designing the CMOS on a 4H-SiC substrate, we compared the electrical characteristics with the reliability of high temperature operation by TCAD simulation. In particular, it was confirmed that changing HfO₂ as the gate dielectric for reliable operation at high temperatures improves the thermal properties compared to SiO₂. By researching SiC CMOS devices, we can integrate high-power SiC power devices with SiC CMOS for excellent performance in terms of efficiency and cost of high-power systems.

• Journal of the Semiconductor & Display Technology
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• v.21 no.1
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• pp.50-55
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• 2022

Due to the wavelength shift problem of micro LED caused by the change of current density, the active matrix driving pixel circuit that is used in OLED cannot be applied to micro LED displays. Therefore, we need a gray scale method based on modulation of duration time of light emission. In this study, we propose the PWM-controlled micro LED pixel circuit based on CMOS thin film transistors (TFTs). By adopting CMOS inverter structure, we can reduce the number of storage capacitors from the circuit and make the operating speed of the circuit faster. Most of all, our circuit is designed to make operating speed of PWM circuit faster by adopting feedback effect through double gate TFT structure. As a result, it takes about 4.7ns to turn on the LED and about 5.6ns to turn it off. This operating time is short enough to avoid the color distortion and help the precise control of the gray scale.

• Proceeding of EDISON Challenge
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• 2015.03a
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• pp.343-346
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• 2015

Ultra-thin body transistor is one of the emerging devices since it control leakage current flows through substrate. In addition, it can be operated by double gates, thus, its on/off current ratio is higher than conventional counterpart. In this paper, we design and investigate a CMOS inverter based on ultra-thin body MOSFETs to estimate its performance in real application. NEGF (non-equilibrium Green's function) method is used to obatain relationship between drain current and voltage. DC transfer is extracted from the relationship, and FO4 (fanout-of-4) propagation delay is reported as 5.1 ps estimated by a simple model.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.136-141
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• 2023

The continuous shrinking of transistors in integrated circuits leads to difficulties in improving performance, resulting in the emerging transistors such as nanosheet field-effect transistors. In this paper, we propose a TCAD-machine learning framework of nanosheet FETs to model the current-voltage characteristics. Sentaurus TCAD simulations of nanosheet FETs are performed to obtain a large amount of device data. A machine learning model of I-V characteristics is trained using the multi-layer perceptron from these TCAD data. The weights and biases obtained from multi-layer perceptron are implemented in a PSPICE netlist to verify the accuracy of I-V and the DC transfer characteristics of a CMOS inverter. It is found that the proposed machine learning model is applicable to the prediction of nanosheet field-effect transistors device and circuit performance.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.38 no.2
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• pp.50-55
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• 2001

In this paper, a 8bit parity checker/generator is designed using a new gate which is proposed to implement the exclusive or(XOR) and exclusive-nor(XNOR) functions for low power consumption on transistor level. Conventional XOR/XNOR gate such as CPL, DPL and CCPL designed to reduce the power consumption has an inverter to get the full swing output signals. But this inverter consumes the major part of power and causes the time delay on CMOS circuits. Thus a new technique was adopted not utilizing inverter in the circuits. The results of simulation by Hspice shows 33% of power reduction compared with CCPL gate when A 8 bit parity checker was made with the proposed new gate using $0.8{\mu}mCMOS$ technology.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.15 no.5
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• pp.335-342
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• 2022

In this paper, a single-bit 3rd-order feedforward delta sigma modulator is proposed for audio applications. The proposed modulator is based on a class-C inverter for low voltage and power applications. For the high-precision requirement, the class-C inverter with regulated cascode structure increases its DC gain and acts as a low-voltage subthreshold amplifier. The proposed Class-C inverter-based modulator is designed and simulated in 180-nm CMOS process. With no performance loss and a low supply voltage compatibility, the proposed class-C inverter-based switched-capacitor modulator achieves high power efficiency. This design achieves an signal-to-noise-and-distortion ratio (SNDR) of 93.9 dB, an signal-to-noise ratio (SNR) of 108 dB, an spurious-free dynamic range (SFDR) of 102 dB, and a dynamic range (DR) of 102 dB at a signal bandwidth of 20 kHz and a sampling frequency of 4 MHz, while only using 280 μW of power consumption from a 0.8-V power supply.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.599-603
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• 1988

In this paper, a flash type A/D converter using Variable Threshold Logic circuit is designed and is layonted by double metal CMOS 2 um design rule. Comparator and register string which is the basic elements of a general flash type A/D converter are substituted by simple comparator circuit which is slightly modified from cmos inverter.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.485-486
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• 2006

This paper proposes a novel low-cost CMOS temperature sensor for controlling the self-refresh period of a mobile DRAM. In this temperature sensor, ring oscillators composed of cascaded inverter stages are used to obtain the temperature of the chip. This method is highly area-efficient, simple and easy for IC implementation as compared to traditional temperature sensors based on analog bandgap reference circuits. The proposed CMOS temperature sensor was fabricated with 80 nm 3-metal DRAM process. It occupies a silicon area of only about less than $0.02\;mm^2$ at $10^{\circ}C$ resolution with under 5uW power consumption at 1 sample/s processing rate. This area is about 33% of conventional temperature sensor in mobile DRAM.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.6
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• pp.597-602
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• 2008

This paper examines the damage effect and delay time of CMOS integrated circuits device with coupling caused by high power microwaves. The waveguide and magnetron was employed to study the influence of high power micro-waves on CMOS inverters. The CMOS inverters were composed of a LED circuit for visual discernment. Also CMOS inverters broken by high power microwave is observed with supply current and delay time. When the power supply current was increased 2.14 times for normal current at 9.9 kV/m, the CMOS inverter was broken by latch-up. Three different types of damage were observed by microscopic analysis: component, onchipwire, and bondwire destruction. Based on the results, CMOS inverters can be applied to database to elucidate the effects of microwaves on electronic equipment.