Compact Modeling for Nanosheet FET Based on TCAD-Machine Learning

TCAD-머신러닝 기반 나노시트 FETs 컴팩트 모델링

  • Junhyeok Song (Department of System Semiconductor Engineering, Sangmyung University) ;
  • Wonbok Lee (Department of System Semiconductor Engineering, Sangmyung University) ;
  • Jonghwan Lee (Department of System Semiconductor Engineering, Sangmyung University)
  • 송준혁 (상명대학교 시스템반도체 공학과) ;
  • 이운복 (상명대학교 시스템반도체 공학과) ;
  • 이종환 (상명대학교 시스템반도체 공학과)
  • Received : 2023.12.01
  • Accepted : 2023.12.14
  • Published : 2023.12.31

Abstract

The continuous shrinking of transistors in integrated circuits leads to difficulties in improving performance, resulting in the emerging transistors such as nanosheet field-effect transistors. In this paper, we propose a TCAD-machine learning framework of nanosheet FETs to model the current-voltage characteristics. Sentaurus TCAD simulations of nanosheet FETs are performed to obtain a large amount of device data. A machine learning model of I-V characteristics is trained using the multi-layer perceptron from these TCAD data. The weights and biases obtained from multi-layer perceptron are implemented in a PSPICE netlist to verify the accuracy of I-V and the DC transfer characteristics of a CMOS inverter. It is found that the proposed machine learning model is applicable to the prediction of nanosheet field-effect transistors device and circuit performance.

Keywords

Acknowledgement

This research was supported in parts by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (No. 2022R1I1A3064285).

References

  1. Root, D.E., "Future device modeling trends." of The Journal of the Institute of Electrical and Electronics Engineers Microwave Magazine Vol. 13, 45-59, 2012. https://doi.org/10.1109/MMM.2012.2216095
  2. Jonghwan Lee., "Noise modeling of gate leakage current in nanoscale MOSFETs" of The Journal of the Semiconductor & Display Technology Vol. 19, p 73-76,2020.
  3. Pelosi, Matteo., "From FinFET to Nanosheet Si-SiGe GAAFET: fabrication process simulation and analysis." Diss. Master Thesis, 2021.
  4. Vanneschi, L. Castelli, M. "Multilayer perceptrons." In Encyclopedia of Bioinformatics and Computational Biology; Elsevier: Amsterdam, The Netherlands, 2019; pp. 612-620.
  5. Woo SangMin, HyunJoon Jeong, JinYoung Choi, HyungMin Cho, Jeong-Taek Kong, and SoYoung Kim., "Machine-learning-based compact modeling for sub-3-nm-node emerging transistors" Electronics Vol. 11, no. 17,p 2761, 2022.
  6. Dong Hwan Kim , Jeong Eun Choi , Tae Min Ha and Sang Jeen Hong., "Modeling with thin film thickness using machine learning." of The Journal of the Semiconductor & Display Technology Vol. 18, p 135-139, 20.
  7. Jiwon Park and Jonghwan Lee, "Improved modeling of I-V characteristics based on artificial neural network in photovoltaic systems." of The Journal of the Semiconductor & Display Technology Vol. 21, p 48-52, 2022.
  8. A. Ruangphanit, K.Kiddee, A.Poyai, Y.Wongprasert, S.Niemcharoen, R.Muanghlua., "The effects of temperature and device dimension of MOSFETs on the DC characteristics of CMOS inverter." of The journal of the Institute of Electrical and Electronics Engineers, p 341-345, 2012.
  9. Soumya Ranjan Panda, K.P.Pradhan, P.K.Sahu., "Device and circuit performance of Si-based accumulation-mode CGAA CMOS inverter." of The Journal of the Material Science in Semiconductor Processing Vol. 66, p 87-91, 2017. https://doi.org/10.1016/j.mssp.2017.04.005