Browse > Article
http://dx.doi.org/10.5515/KJKIEES.2008.19.6.597

Damage Effect and Delay Time of CMOS Integrated Circuits Device with Coupling Caused by High Power Microwave  

Hwang, Sun-Mook (School of Electrical Engineering, Inha University)
Hong, Joo-Il (School of Electrical Engineering, Inha University)
Han, Seung-Moon (School of Electrical Engineering, Inha University)
Huh, Chang-Su (School of Electrical Engineering, Inha University)
Publication Information
The Journal of Korean Institute of Electromagnetic Engineering and Science / v.19, no.6, 2008 , pp. 597-602 More about this Journal
Abstract
This paper examines the damage effect and delay time of CMOS integrated circuits device with coupling caused by high power microwaves. The waveguide and magnetron was employed to study the influence of high power micro-waves on CMOS inverters. The CMOS inverters were composed of a LED circuit for visual discernment. Also CMOS inverters broken by high power microwave is observed with supply current and delay time. When the power supply current was increased 2.14 times for normal current at 9.9 kV/m, the CMOS inverter was broken by latch-up. Three different types of damage were observed by microscopic analysis: component, onchipwire, and bondwire destruction. Based on the results, CMOS inverters can be applied to database to elucidate the effects of microwaves on electronic equipment.
Keywords
CMOS; High Power Microwave(HPM); Delay Time; Supply Current;
Citations & Related Records
연도 인용수 순위
  • Reference
1 Mats G. Backstrom, "The threat from intentional EMI against the civil technical infrastructure", Reprint from ESW2006, 3rd European Survivability Workshop, pp. 16-19, May 2006
2 M. Camp, H. Garbe, and D. Nitsch, "Influence of the technology on the destruction effects of semi-conducters by impact of EMP and UWB pulses", IEEE Trans. on EMC, vol. 1, pp. 87-92, 2002
3 J. E. Hall, J. A. Seitchik, L. A. Arledge, P. Yang, and P. K. Fung, "Analysis of latchup susceptibility in CMOS circuits", Electron Devices Meeting, 1984 International, vol. 30, pp. 292-295, 1984
4 D. Taylor, D. V. Giri, High-power Microwave Systems and Effects, Washington, D.C., Taylor & Francis, 1994
5 "JESD78 latch-up testing standard", Electronic Industry Association JEDEC standards, Arlington, VA.
6 D. B. Estreich, "The physics and modeling of latch- up and CMOS integrated circuits", Stanford Electron. Labs., Stanford, CA, Tech. Rep. G201-9, Nov. 1980
7 M. Camp, H. Gerth, H. Garbe, and H. Haase, "Predicting the breakdown behavior of microcontrollers under EMP/UWB impact using a statistical analysis", IEEE Trans. on Electromagnetic Compatibility, vol. 46, pp. 368-379, 2004   DOI   ScienceOn
8 Mats G. Backstrom, "Susceptibility of electronic systems to high power microwaves: Summary of test experience", IEEE Transactions on Electromagnetic Compatibility, vol. 46, no. 3, Aug. 2004