• 제목/요약/키워드: Bottom gate

검색결과 237건 처리시간 0.035초

모형실험에 의한 장지간 트러스형 리프트 게이트의 진동 특성 (Dynamic Characteristics of the Long Span Truss-Type Lift Gate by Model Test)

  • 이성행;함형길;유광식
    • 한국농공학회논문집
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    • 제57권6호
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    • pp.117-123
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    • 2015
  • An experimental study of model truss-type vertical gate consisting of a truss and a plate was presented in this paper to examine the structural dynamics of the gates. A 1:61 scale model was constructed for the 95 m prototype gate using an acrylic truss and an acrylonitrile butadiene styrene plate. The scaled model was tested in a 1.6 m wide concrete flume for two orientations to determine the effects of gate orientation on structural vibrations. Natural frequencies of the model gate was measured and calibrated with FEM predictions. Vertical vibrations were measured under various operational conditions, including a range of bottom opening heights and different upstream and downstream water levels. The gate model with reverse direction was preferred due to its low overall vibrational response and flow level combinations. The test results also provide a basic dataset for development of operations guidelines that minimize flow-induced vibrations of the gates.

The effect of 3-mercapto-5-nitro-benzimidazole (MNB) and poly (methyl methacrylate) (PMMA) treatment sequence organic thin film transistor

  • Park, Jin-Seong;Suh, Min-Chul;Jeong, Jong-Han;Kim, Su-Young;Mo, Yeon-Gon
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.1174-1177
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    • 2006
  • A bottom contact organic thin film transistor (OTFT) is fabricated with an organic double-layered gate insulator (GI) and pentacene. The PMMA and MNB layers are treated on gate insulator and source/drain (S/D, Au) before depositing pentacene to investigate device properties and pentacene growth. The sequence of surface treatment affects a device performance seriously. The ultra-thin PMMA (below 50A) was deposited on organic gate insulator and S/D metal by spin coating method, which showed no deterioration of on-state current (Ion) although bottom contact structure was exploited. We proposed that the reason of no contact resistance (Rc) increase may be due to a wettability difference in between PMMA / Au and PMMA / organic GI. As a result, the device treated by $PMMA\;{\rightarrow}\;MNB$ showed much better Ion behavior than those fabricated by $MNB\;{\rightarrow}\;PMMA$. We will report the important physical and electrical performance difference associated with surface treatment sequence.

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4.1” Transparent QCIF AMOLED Display Driven by High Mobility Bottom Gate a-IGZO Thin-film Transistors

  • Jeong, J.K.;Kim, M.;Jeong, J.H.;Lee, H.J.;Ahn, T.K.;Shin, H.S.;Kang, K.Y.;Park, J.S.;Yang, H,;Chung, H.J.;Mo, Y.G.;Kim, H.D.;Seo, H.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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    • pp.145-148
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    • 2007
  • The authors report on the fabrication of thin film transistors (TFTs) that use amorphous indium-gallium-zinc oxide (a-IGZO) channel and have the channel length (L) and width (W) patterned by dry etching. To prevent the plasma damage of active channel, a 100-nm-thckness $SiO_{x}$ by PECVD was adopted as an etch-stopper structure. IGZO TFT (W/L=10/50${\mu}m$) fabricated on glass exhibited the high performance mobility of $35.8\;cm^2/Vs$, a subthreshold gate voltage swing of $0.59V/dec$, and $I_{on/off}$ of $4.9{\times}10^6$. In addition, 4.1” transparent QCIF active-matrix organic light-emitting diode display were successfully fabricated, which was driven by a-IGZO TFTs.

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Direct Current (DC) Bias Stress Characteristics of a Bottom-Gate Thin-Film Transistor with an Amorphous/Microcrystalline Si Double Layer

  • Jeong, Tae-Hoon;Kim, Si-Joon;Kim, Hyun-Jae
    • Transactions on Electrical and Electronic Materials
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    • 제12권5호
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    • pp.197-199
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    • 2011
  • In this paper, the bottom-gate thin-film transistors (TFTs) were fabricated with an amorphous/microcrystalline Si double layer (DL) as an active layer and the variations of the electrical characteristics were investigated according to the DC bias stresses. Since the fabrication process of DL TFTs was identical to that of the conventional amorphous Si (a-Si) TFTs, it creates no additional manufacturing cost. Moreover, the amorphous/microcrystalline Si DL could possibly improve stability and mass production efficiency. Although the field effect mobility of the typical DL TFTs is similar to that of a-Si TFTs, the DL TFTs had a higher reliability with respect to the direct current (DC) bias stresses.

4" E-ink Active-matrix Displays based on Ink-jet Printed Organic Thin Film Transistors

  • Koo, Bon-Won;Kim, Do-Hwan;Moon, Hyun-Sik;Kim, Jung-Woo;Jung, Eun-Jeong;Kim, Joo-Young;Jin, Yong-Wan;Lee, Sang-Yun;Kim, Jong-Min
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.1631-1633
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    • 2008
  • We demonstrate 4-in QVGA active-matrix electrophoretic display based on ink-jet printed organic transistors on glass substrates. Our TFT array had a bottom-gate, bottom-contact device architecture. The organic semiconductor and gate dielectric were solution processed. The field-effect mobility of the printed devices, calculated in the saturation region, was $0.1{\sim}0.3cm^2/Vs$ at Vg=-20 V.

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Bottom Gate Microcrystalline Silicon TFT Fabricated on Plasma Treated Silicon Nitride

  • Huang, Jung-Jie;Chen, Yung-Pei;Lin, Hung-Chien;Yao, Hsiao-Chiang;Lee, Cheng-Chung
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.218-221
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    • 2008
  • Bottom-gate microcrystalline silicon thin film transistors (${\mu}c$-Si:H TFTs) were fabricated on glass and transparent polyimide substrates by conventional 13.56 MHz RF plasma enhanced chemical vapor deposition at $200^{\circ}C$. The deposition rate of the ${\mu}c$-Si:H film is 24 nm/min and the amorphous incubation layer near the ${\mu}c$-Si:H/silicon nitride interface is unobvious. The threshold voltage of ${\mu}c$-Si:H TFTs can be improved by $H_2$ or $NH_3$ plasma pretreatment silicon nitride film.

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Electrical Analysis of Bottom Gate TFT with Novel Process Architecture

  • Pak, Sang-Hoon;Jeong, Tae-Hoon;Kim, Si-Joon;Kim, Kyung-Ho;Kim, Hyun-Jae
    • Journal of Information Display
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    • 제9권2호
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    • pp.5-8
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    • 2008
  • Bottom gate thin film transistors (TFTs) with microcrystalline and amorphous Si (a-Si) double active layers (DAL) were fabricated. Since the process of DAL TFTs can use that of conventional a-Si TFTs, these DAL TFT process has advantages, such as low cost, large substrate, and mass production capacity. In order to analyze the degradation characteristics in saturation region for driving TFTs of active matrix organic light emitting diode, three different dynamic stresses were applied to DAL TFTs and a-Si TFTs. The threshold voltage shift of DAL TFTs and a-Si TFTs during 10,000 second stress is 0.3V and 2V, respectively. DAL TFTs were more reliable than a-Si TFTs.

Low temperature plasma deposition of microcrystalline silicon films for bottom gate thin film transistors

  • Cabarrocas, P.Roca i;Djeridane, Y.;Abramov, A.;Bui, V.D.;Bonnassieux, Y.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.56-60
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    • 2006
  • We review our studies on the growth of microcrystalline silicon films by the standard PECVD technique. In situ spectroscopic ellipsometry studies allow the optimization of the complex film structure with respect to competing aspects of the growth process. Fine tuning the hydrogen flux, the ion energy, and the nature of the species contributing to deposition produces unique films with a fully crystallized interface with silicon nitride. These materials have been successfully incorporated in bottom gate TFTs which present mobility values in the range of 1 to 3 $cm^2/V.s$, and stable characteristics when submitted to a bias stress. The stability of these TFTs makes them suitable for driver applications in AMLCDs as well as pixel elements in OLED displays.

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Electrical Characteristics of Bottom-Contact Organic Thin-Film-Transistors Inserting Adhesion Layer Fabricated by Vapor Deposition Polymerization and Ti Adhesion Metal Layer

  • Park, Il-Houng;Hyung, Gun-Woo;Choi, Hak-Bum;Kim, Young-Kwan
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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    • pp.958-961
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    • 2007
  • The electrical characteristics of organic thin-filmtransistor (OTFTs) can be improved by inserting adhesion layer on gate dielectrics. Adhesion layer was used as polymeric adhesion layer deposited on inorganic gate insulators such as silicon dioxide $(SiO_2)$ and it was formed by vapor deposition polymerization (VDP) instead of spin-coating process. The OTFTs obtained the on/off ratio $of{\sim}10^4$, threshold voltage of 1.8V, subthreshold slop of 2.9 V/decade and field effect mobility about $0.01\;cm^2/Vs$.

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투명 ZnO를 활성 채널층으로 하는 박막 트랜지스터 (Thin Film Transistor with Transparent ZnO as active channel layer)

  • 신백균
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제55권1호
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    • pp.26-29
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    • 2006
  • Transparent ZnO thin films were prepared by KrF pulsed laser deposition (PLD) technique and applied to a bottom-gate type thin film transistor device as an active channel layer. A high conductive crystalline Si substrate was used as an metal-like bottom gate and SiN insulating layer was then deposited by LPCVD(low pressure chemical vapour deposition). An aluminum layer was then vacuum evaporated and patterned to form a source/drain metal contact. Oxygen partial pressure and substrate temperature were varied during the ZnO PLD deposition process and their influence on the thin film properties were investigated by X-ray diffraction(XRD) and Hall-van der Pauw method. Optical transparency of the ZnO thin film was analyzed by UV-visible phometer. The resulting ZnO-TFT devices showed an on-off ration of $10^6$ and field effect mobility of 2.4-6.1 $cm^2/V{\cdot}s$.