• Journal of information and communication convergence engineering
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• v.9 no.5
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• pp.587-590
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• 2011

The absence of deep traps for electrons in the spectrum of $As_{40}Se_{30}S_30$ localized states films obtained by ion sputtering was determined. Bipolar drift of charge carriers was found in amorphous $As_{40}Se_{30}S_30$ films of chalcogenide glassy semiconductors, obtained by ion-plasma sputtering of high-frequency, unlike the films of these materials obtained by thermal evaporation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.844-847
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• 2001

In this work, transient characteristics of the Non-Punch Through(NPT) Insulated Gate Bipolar Transistor(IGBT) has been studied. we has analyzed with lifetimes excess minority carrier injected into N-dirft, base region of IGBT's BJT part and accumulated charge of on-state which affected swiching characteristic. In this paper, excess minority carrier and charge distribution in active base region is expressed analytically. This analysis proposed optical trade-off between lifetimes and accumulated charge for decreasing switching losses because charge result in switching loss when device was tuned off.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.292-295
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• 2002

In this work, transient characteristics of NPT(Non Punch Through)-IGBT(Insulated Gate Bipolar Transistor) have been studied with different temperatures analytically. Power losses are caused by heat generated in MIT-IGBT for steady state and transient state conditions. We therefore have focused on the analysis of excess carrier concentration and excess charge injected into N-drift layer with different temperatures and have obtained anode voltage drop during turn-off with lifetime of 2.4[${\mu}$s].

• Journal of IKEEE
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• v.7 no.1 s.12
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• pp.1-8
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• 2003

In this study, the high performance BCD device structure which satisfies the high voltage and fast switching speed characteristics is devised. Through the process and device simulation, optimal process spec. & device spec. are designed. We adapt double buried layer structure, trench isolation process, n-/p-drift region formation and shallow junction technology to optimize an electrical property as mentioned above. This I.C consists of 20V level high voltage bipolar npn/pnp device, 60V level LDMOS device, a few Ampere level VDMOS, 20V level CMOS device and 5V level logic CMOS.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.249-252
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• 2000

A new Smart rower IC's based on the Partial SOI technology was designed for such applications as mobile communication systems, high-speed HDD systems etc. A new methodology of integrating a 0.8${\mu}{\textrm}{m}$ BiCMOS compatible Smart Power technology, high voltage bipolar device, high speed SAVEN bipolar device, LDD NMOSFET and a new LDMOSFET based on the Partial SOI technology is presented in this paper. The high voltage bipolar device has a breakdown voltage of 40V for the output stage of analog circuit. The optimized Partial SOI LDMOSFET has an off-state breakdown voltage of 75 V and a specific on- resistance of 0.249mΩ.$\textrm{cm}^2$ with the drift region length of 3.5${\mu}{\textrm}{m}$. The high-speed SAVEN bipolar device shows cut-off frequency of about 21㎓. The simulator DIOS and DESSIS has been used to get these results.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.70-70
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• 2009

In this paper, we proposed 2500V Non punch-through(NPT) Insulated gate bipolar transistor(IGBT) for high voltage industry application. we carried out optimal simulation for high efficiency of 2500V NPT IGBT according to size of device. In results, we obtaind design parameter with 375um n-drift thickness, 15um gate length, and 8um emitter windows. After we simulate with optimal parameter, we obtained 2840V breakdown voltage and 3.4V Vce,sat. These design and process parameter will be used designing of more 2000V NPT IGBT devices.

• Proceedings of the KOSOMBE Conference
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• v.1997 no.05
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• pp.349-352
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• 1997

The EEG amplifier satisfies high gain, high common mode rejection ratio(CMRR), high input impedance, low thermal drift, low noise and good d.c. performance. The Bipolar amplifier of this paper safisfies above categories and aim at minimization of the ESU(electric surgical unit) interference.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.4
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• pp.273-279
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• 2010

In this paper, we proposed 2500 V Non punch-through(NPT) Insulated gate bipolar transistor(IGBT) for high voltage industry application. we carried out optimal simulation for high efficiency of 2500 V NPT IGBT according to size of device. In results, we obtaind design parameter with 375 um n-drift thickness, 15 um gate length, and 8um emitter windows. After we simulate with optimal parameter, we obtained 2840 V breakdown voltage and 3.4V Vce,sat. These design and process parameter will be used designing of more 2000 V NPT IGBT devices.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.891-894
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• 1999

ICP reactor produces high-density and high-uniformity plasma in large area, are has excellent characteristic of direction in the case of etching. Until now, many algorithms used one mesh method. These algorithms are not appropriate for sub 0.1 ${\mu}{\textrm}{m}$ device technologies which should deal with each ion. These algorithms could not present exactly straggle and interaction between projectile ions and could not consider reflection effects due to interactions among next projectile ions, reflected ions and sputtering ions, simultaneously. And difficult consider am-bipolar drift effect.

• Journal of Electrical Engineering and Technology
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• v.9 no.2
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• pp.686-694
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• 2014

A power semiconductor device, usually used as a switch or rectifier, is very significant in the modern power industry. The power semiconductor, in terms of its physical properties, requires a high breakdown voltage to turn off, a low on-state resistance to reduce static loss, and a fast switching speed to reduce dynamic loss. Among those parameters, the breakdown voltage and on-state resistance rely on the doping concentration of the drift region in the power semiconductor, this effect can be more important for a higher voltage device. Although the low doping concentration in the drift region increases the breakdown voltage, the on-state resistance that is increased along with it makes the static loss characteristic deteriorate. On the other hand, although the high doping concentration in the drift region reduces on-state resistance, the breakdown voltage is decreased, which limits the scope of its applications. This addresses the fact that breakdown voltage and on-state resistance are in a trade-off relationship with a parameter of the doping concentration in the drift region. Such a trade-off relationship is a hindrance to the development of power semiconductor devices that have idealistic characteristics. In this study, a novel structure is proposed for the Insulated Gate Bipolar Transistor (IGBT) device that uses conductivity modulation, which makes it possible to increase the breakdown voltage without changing the on-state resistance through use of a P-floating layer. More specifically in the proposed IGBT structure, a P-floating layer was inserted into the drift region, which results in an alleviation of the trade-off relationship between the on-state resistance and the breakdown voltage. The increase of breakdown voltage in the proposed IGBT structure has been analyzed both theoretically and through simulations, and it is verified through measurement of actual samples.