• 한국인터넷방송통신학회논문지
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• 제8권2호
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• pp.15-21
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• 2008

본 논문에서는 2진논리의 확장을 Galis체상에서 해석하여 확장논리에 기초한 순차디지털논리시스템과 컴퓨터구조의 핵심인 연산알고리즘을 논의하였다. 순차디지털논리시스템은 Building Block으로서 T-gate를 사용하였으며, 차순상태함수, 출력함수를 도출하여 최종 궤환이 없는 Moore Model의 순차디지털논리시스템을 구성하였다. 그리고, 컴퓨터구조에서 중요한 연산알고리즘의 핵심인 가산, 감산, 승산 및 제산 알고리즘을 유한체의 수학적 성질을 토대로 각각 도출하였다. 특히, 유한체 GF($P^m$)상에서 P=2인 경우는 기존의 2진디지털논리시스템에 적용이 용이하다는 장점이 있으며, mod2의 성질에 의해 감산 알고리즘은 가산 알고리즘과 동일하다. 제안한 방법은 기존의 2진논리를 확장할 수 있어 좀 더 효율적으로 디지털논리시스템을 구성할 수 있을 것으로 사료된다.

• 디지털산업정보학회논문지
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• 제11권3호
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• pp.45-51
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• 2015

In this paper, we discuss the belief propagation decoding algorithm for polar codes. The performance of Polar codes for shorter lengths is not satisfactory. Motivated by this, we propose a novel technique to improve its performance at short lengths. We showed that the probability of messages passed along the factor graph of polar codes, can be increased by multiplying the current message of nodes with their previous message. This is like a feedback path in which the present signal is updated by multiplying with its previous signal. Thus the experimental results show that performance of belief propagation polar decoder can be improved using this proposed technique. Simulation results in binary-input additive white Gaussian noise channel (BI-AWGNC) show that the proposed belief propagation polar decoder can provide significant gain of 2 dB over the original belief propagation polar decoder with code rate 0.5 and code length 128 at the bit error rate (BER) of $10^{-4}$.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.303-305
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• 2003

This paper discusses single-phase AC-DC converter that driven by binary combination at different transformer winding ratio. It has a advantage that constructs a control system simply and obtain load current of good quality without filter circuit and free from noise or isolation for lower switching frequency. Also, this has merit that can do high power capacity. In this research, study on feedback circuit that consist for load stability of AC-DC multi-level converter.

• International Journal of Control, Automation, and Systems
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• 제1권4호
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• pp.412-430
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• 2003

In many practical problems in signal processing and control, the signal values are often restricted to belong to a finite number of levels. These questions are generally referred to as "finite alphabet" problems. There are many applications of this class of problems including: on-off control, optimal audio quantization, design of finite impulse response filters having quantized coefficients, equalization of digital communication channels subject to intersymbol interference, and control over networked communication channels. This paper will explain how this diverse class of problems can be formulated as optimization problems having finite alphabet constraints. Methods for solving these problems will be described and it will be shown that a semi-closed form solution exists. Special cases of the result include well known practical algorithms such as optimal noise shaping quantizers in audio signal processing and decision feedback equalizers in digital communication. Associated stability questions will also be addressed and several real world applications will be presented.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1986년도 한국자동제어학술회의논문집; 한국과학기술대학, 충남; 17-18 Oct. 1986
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• pp.238-243
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• 1986

Distillation columns are widely used in almost every chemical plant. The use of multivariable control for such units is attractive because of the strong interactions exhibited between outputs and inputs and the desire to control simultaneously both top and bottom products. In this research design of a robust multivariable controller for distillation column was considered; output feedback controller with proportional and integral modes was designed using pole assignment. The transfer function matrix was obtained by fitting the step response realtions between single input double output pairs of variables. This matrix was then converted to linear time invariant state space model by multivariable realization technique. With the proposed multivariable proportional and integral controller applied to the process, the result of the digital computer simulation showed a good performance of asymtotic tracking. The limited experimental performance of this multivariable control was compared with the result from simulation. It was found that the proposed controller performed satisfactorily for the distillation column which separated binary mixture of methanol and water.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.410-413
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• 1988

In this paper, the real-time optical associative memory using multiple hologram which is generated with two angular multiplexed reference beams and Fourier transformed object beam in the $BaTiO_{3}$ crystal based on DFWM mechanism. When one image is recorded in the $BaTiO_{3}$ crystal, complete image can be recalled by 9 % partial input of the stored original image without any additional thresholding and optical feedback process. As an experimental result of multiple Fourier hologram which is recorded with two binary images, OHCHAS and PARKHK, we can obtain complete image recalled by 1/6 partial input of the stored image.

• The Journal of the Acoustical Society of Korea
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• 제24권3E호
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• pp.99-108
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• 2005

To investigate the equalizer performance in underwater acoustic communication m the presence of intersymbol interference (ISI) due to multipath, computer simulations are carried out in discrete multipath shallow water channels for three different horizontal ranges. For the purpose of computation simplicity, least mean square (LMS) algorithm is adopted both in linear equalizer and nonlinear equalizer, decision feedback equalizer (DFE) to cancel out ISI effects. Binary phase shift keying (BPSK) signals have been transmitted with high data rate of 2000bps through the use of equalization technique. The results demonstrate that equalization is an efficient way to achieve high transmission data rate in the shallow water channel.

• 산업기술연구
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• 제30권A호
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• pp.25-29
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• 2010

In this paper, we implement a multi-touch system using FIDR. The implementation consists of hardware manufacture and development of image processing system. In the hardware system, touch screen, infrared LED placements and infrared camera are made. The image processing procedure is to extract each pointer's coordinates from image data and includes binary-coding, noise-elimination, labeling and calculation of mass center. From the implementation, we are able to make a multi-touch system with considerably lower cost than the existing ones.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 1999년도 추계종합학술대회
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• pp.534-537
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• 1999

This paper describes a design of pipelined adaptive decision-feedback equalizer (PADFE) for high bit-rate wireless digital communication systems. To enhance the throughput rate of ADFE, two pipeline stages are inserted into the critical path of ADFE by using delayed least-mean-square (DLMS) algorithm. Redundant binary (RB) arithmetic is applied to all the data processing of ADFE including filter laps and coefficient update blocks. When compared with conventional methods based on two's complement arithmetic, the proposed approach reduces arithmetic complexity, as well as results in a very simple complex-valued filter structure, thus suitable for VLSI implementation. The design parameters (filter tap, coefficient and internal bit-width, etc.) and equalization performance (bit error rate, convergence speed, etc.) are analyzed by algorithm-level simulation using COSSAP. The PADFE was designed using VHDL and Synopsys, and mapped into two ALTERA FLEX10k100 FPGAs.

• 대한전자공학회논문지SD
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• 제38권8호
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• pp.54-61
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• 2001

High-bandwidth DRAM을 위해 1Gb/s의 데이터 전송률까지 동작하고 그 출력 전압 스윙이 온도와 전원 전압(VDD) 변동에 무관한 CMOS open-drain 출력 구조 회로를 설계하였다. 출력 구동 회로는 여섯 개의 binary-weighted NMOS 트랜지스터로 구성되는데, 이 여섯 개 중에서 ON시킬 current control register의 내용은 추가 호로 없이 DRAM 칩에 존재하는 auto refresh 신호를 이용하여 새롭게 수정하였다. Auto refresh 시간 구간동안 current control register를 수정하는데, 이 시간 구간동안 부궤환 (negative feedback) 동작에 의해 low level 출력 전압($V_OL$)이 저전압 밴드갭 기준전압 발생기(bandgap reference voltage generator)에 의해서 만들어진 기준전압($V_{OL.ref}$)과도 같도록 유지된다. 테스트 칩은 1Gb/s의 데이터 전송률까지 성공적으로 동작하였다. 온도 $20^{\circ}C$~$90^{\circ}C$, 전원 전압 2.25V~2.75V영역에서 최악의 경우 제안된 출력 구동 회로의 $V_{OL.ref}$와 $V_OL$의 변동은 각각 2.5%와 725%로 측정된 반면, 기존의 출력 구동 회로의 $V_OL$의 변동은 같은 온도의 전원 접압의 영역에 대해 24%로 측정되었다.