• Title/Summary/Keyword: Bias pumping

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Spiking Suppression of Quasi-continuous-wave Pulse Nd:YAG Laser Based on Bias Pumping

  • Chen, Yazheng;Wang, Fuyong
    • Current Optics and Photonics
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    • v.6 no.4
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    • pp.400-406
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    • 2022
  • We numerically demonstrate that the inherent spiking behavior in the quasi-continuous-wave (QCW) operation of an Nd:YAG laser can be suppressed by adopting bias pumping. After spiking suppression, the output QCW pulses from a bias-pumped Nd:YAG laser are very stable, and they can maintain nearly the same temporal shape as that of pump pulse under different pump repetition rates and peak powers. Our study implies that bias pumping is an alternative method of spiking suppression in solid-state lasers, and the application areas of an Nd:YAG laser may be extended by bias pumping.

A study on the Design of a stable Substrate Bias Generator for Low power DRAM's (DRAM 의 저전력 구현을 위한 안정한 기판전압 발생기 설계에 관한 연구)

  • 곽승욱;성양현곽계달
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.703-706
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    • 1998
  • This paper presents an efficient substrate-bias generator(SBG)for low-power, high-density DRAM's The proposed SBG can supply stable voltage with switching the supply voltage of driving circuit, and it can substitude the small capacitance for the large capacitance. The charge pumping circuit of the SBG suffere no VT loss and is to be applicable to low-voltage DRAM's. Also it can reduce the power consumption to make VBB because of it's high pumping efficiency. Using biasing voltage with positive temperature coefficient, VBB level detecting circuit can detect constant value of VBB against temperature variation. VBB level during VBB maintaining period varies 0.19% and the power dissipation during this period is 0.16mw. Charge pumping circuit can make VBB level up to -1.47V using VCC-1.5V, and do charge pumping operation one and half faster than the conventional ones. The temperature dependency of the VBB level detecting circuit is 0.34%. Therefore the proposed SBG is expected to supply a stable VBB with less power consumption when it is used in low power DRAM's.

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Pumping-up Current Characteristics of Linear Type Magnetic Flux Pump

  • Chung, Yoondo;Muta, Itsuya;Hoshino, Tsutomu;Nakamura, Taketsune;Ko, Taekuk
    • Progress in Superconductivity and Cryogenics
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    • v.6 no.2
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    • pp.29-34
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    • 2004
  • The linear type flux pump aims to compensate a little bit decremental persistent current of the HTS magnet in NMR and MRI spectrometers. The flux pump mainly consists of DC bias coil, 3-phase AC coil and Nb foil. The persistent current in closed superconductive circuit can be easily adjusted by the 3-phase AC current, its frequency and the DC bias current. In the experiment, it has been investigated that the flux pump can effectively charge the current in the load coil of 543 mH for various frequencies in 18 minutes under the DC bias of 10 A and the AC of 5 $A_{rms}$. The maximum magnitudes of pumping current and load magnet voltage are 0.72 A/min and 20 ㎷, respectively. Based on simulation results by the FEM are proved to nearly agree with experimental ones.

A Study on the Si-SiO$_2$Interface Traps of the Degraded SONOSFET Nonveolatile Memories with the Charge Pumping Techniques (Charge Pumping 기술을 응용한 열화된 SONOSFET 비휘발성 기억소자의 Si-SiO$_2$ 계면트랩에 관한 연구)

  • 김주열;김선주;이성배;이상배;서광열
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1994.11a
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    • pp.59-64
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    • 1994
  • The Si-SiO$_2$interface trpas of the degraded short-channel SONOSFET memory devices were investigated using the charge pumping techniques. The degradation of devices with write/erase cycle appeared as the increase of the Si-SiO$_2$interface trap density. In order to determine the capture cross-section of the interface trap. I$\_$CP/-V$\_$GL/ characteristic curves were measured at different temperatures. Also, the spatial distributions of Si-SiO$_2$interface trap were examined by the variable-reverse bias boltage method.

A Continuous Electrical Cell Lysis Chip using a DC Bias Voltage for Cell Disruption and Electroosmotic Flow (한 쌍의 전극으로 전기 삼투 유동과 세포 분쇄 기능을 동시에 구현한 연속적인 세포 분쇄기)

  • Lee, Dong-Woo;Cho, Young-Ho
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.32 no.10
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    • pp.831-835
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    • 2008
  • We present a continuous electrical cell lysis chip, using a DC bias voltage to generate the focused high electric field for cell lysis as well as the electroosmotic flow for cell transport. The previous cell lysis chips apply an AC voltage between micro-gap electrodes for cell lysis and use pumps or valves for cell transport. The present DC chip generates high electrical field by reducing the width of the channel between a DC electrode pair, while the previous AC chips reducing the gap between an AC electrode pair. The present chip performs continuous cell pumping without using additional flow source, while the previous chips need additional pumps or valves for the discontinuous cell loading and unloading in the lysis chambers. The experimental study features an orifice whose width and length is 20 times narrower and 175 times shorter than the width and length of a microchannel. With an operational voltage of 50 V, the present chip generates high electric field strength of 1.2 kV/cm at the orifice to disrupt cells with 100% lysis rate of Red Blood Cells and low electric field strength of 60 V/cm at the microchannel to generate an electroosmotic flow of $30{\mu}m/s{\pm}9{\mu}m/s$. In conclusion, the present chip is capable of continuous self-pumping cell lysis at a low voltage; thus, it is suitable for a sample pretreatment component of a micro total analysis system or lab-on-a-chip.

Design of a 512b Multi-Time Programmable Memory IPs for PMICs (PMIC용 512비트 MTP 메모리 IP설계)

  • Jang, Ji-Hye;Ha, Pan-Bong;Kim, Young-Hee
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.9 no.1
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    • pp.120-131
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    • 2016
  • In this paper, a 512b MTP memory IP is designed by using MTP memory cells which are written by the FN (Fowler-Nordheim) tunneling method with only MV (medium voltage) devices of 5V which uses the back-gate bias, that is VNN (negative voltage). The used MTP cell consists of a CG (control gate) capacitor, a TG (tunnel gate) transistor, and a select transistor. To reduce the size of the MTP memory cell, just two PWs (P-wells) are used: one for the TG and the select transistors; and the other for the CG capacitor. In addition, just one DNW (deep N-well) is used for the entire 512b memory cell array. VPP and VNN generators supplying pumping voltages of ${\pm}8V$ which are insensitive to PVT variations since VPP and VNN level detectors are designed by a regulated voltage, V1V (=1V), provided by a BGR voltage generator.

Comparative Analysis of Channel Length Dependence of NBTI and CHC Characteristics in PMOSFETs (PMOSFET의 채널 길이에 따른 NBTI 스트레스와 CHC 스트레스의 신뢰성 특성 비교 분석)

  • Yu, Jae-Nam;Kwon, Sung-Kyu;Shin, Jong-Kwan;Oh, Sun-Ho;Lee, Ho-Ryung;Jang, Sung-Yong;Song, Hyung-Sub;Lee, Ga-Won;Lee, Hi-Deok
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.27 no.7
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    • pp.438-442
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    • 2014
  • Channel length dependence of NBTI (negative bias temperature instablilty) and CHC (channel hot carrier) characteristics in PMOSFET is studied. It has been considered that HC lifetime of PMOSFET is larger than NBTI lifetime. However, it is shown that CHC degradation is greater than NBTI degradation for PMOSFET with short channel length. 1/f noise and charge pumping measurement are used for analysis of these degradations.

A Charge Pump with Improved Charge Transfer Capability and Relieved Bulk Forward Problem (전하 전달 능력 향상 및 벌크 forward 문제를 개선한 CMOS 전하 펌프)

  • Park, Ji-Hoon;Kim, Joung-Yeal;Kong, Bai-Sun;Jun, Young-Hyun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.4
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    • pp.137-145
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    • 2008
  • In this paper, novel CMOS charge pump having NMOS and PMOS transfer switches and a bulk-pumping circuit has been proposed. The NMOS and PMOS transfer switches allow the charge pump to improve the current-driving capability at the output. The bulk-pumping circuit effectively solves the bulk forward problem of the charge pump. To verify the effectiveness, the proposed charge pump was designed using a 80-nm CMOS process. The comparison results indicate that the proposed charge pump enhances the current-driving capability by more than 47% with pumping speed improved by 9%, as compared to conventional charge pumps having either NMOS or PMOS transfer switch. They also indicate that the charge pump reduces the worst-case forward bias of p-type bulk by more than 24%, effectively solving the forward current problem.

A High Performance Harmonic Mixer Using a plastic packaged device

  • Kim, Jae-Hyun;Go, Min-Ho;Park, Hyo-Dal;Shin, Hyun-Sik
    • The Journal of the Korea institute of electronic communication sciences
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    • v.2 no.1
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    • pp.1-9
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    • 2007
  • In this paper, a third-order harmonic mixer is designed using frequency multiplier theory for the Ka-band. The gate bias voltage is selected by frequency multiplier theory to maximize the third-order harmonic element ofthe fundamental LO frequency in the proposed mixer. The designed mixer has a gate mixer structure composed of a gate terminal input for the fundamental local signal ($f_{LO}$), RF signal (${RF}$) and a drain terminal output for the harmonic frequency ($3f_{LO}-f_{RF}$) respectively. The Ka-band harmonic mixer is designed and fabricated using a commercial GaAs MESFET device with a plastic package. The proposed mixer will provide a solution for the problems found in the high cost, complex circuitry in a conventional Ka-band mixer. The 33.5 GHz harmonic mixer has a -10 dB conversion gain by pumping 11.5 GHz LO with a +5 dBm level.

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The Properties of Photoinduced Birefringence in Chalcogenide Thin Films by the Electric Field Effects (전계효과에 의한 칼코게나이드 박막에서의 광유기 복굴절 특성)

  • 장선주;박종화;여철호;정홍배
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.14 no.1
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    • pp.58-63
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    • 2001
  • We have investigated the photoinduced birefrinence by the electric field effects in chalcogenide thin films. The electric field effects have investigated the various applied bias voltages(forward and reverse) in chalcogenide thin films. A pumping (inducing) and a probing bean were using a linearly polarized He-Ne laser light (633nm) and semiconductor laser light (780nm), respectively. The result was shown that the birefringence had a higher value in DC +2V than the others, Also, we obtained the birefringence in the electric field effects by various voltages. In addition, we have discussed the anisotropy property of chalcogenide thin films by the electric field effects.

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