• Journal of Electrical Engineering and Technology
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• v.4 no.4
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• pp.546-551
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• 2009

In this paper, we describe a self-aligned fabrication method for a nano-patterned bottom electrode using flood exposure from the backside. Misalignments between layers could cause the final devices to fail after the fabrication of the nano-scale bottom electrodes. A self-alignment was exploited to embed the bottom electrode inside the glass substrate. Aluminum patterns act as a dry etching mask to fabricate glass trenches as well as a self-aligned photomask during the flood exposure from the backside. The patterned photoresist (PR) has a negative sidewall slope using the flood exposure. The sidewall slopes of the glass trench and the patterned PR were $54.00^{\circ}$ and $63.47^{\circ}$, respectively. The negative sidewall enables an embedment of a gold layer inside $0.7{\mu}m$ wide glass trenches. Gold residues on the trench edges were removed by the additional flood exposure with wet etching. The sidewall slopes of the patterned PR are related to the slopes of the glass trenches. Nano-scale bottom electrodes inside the glass trenches will be used in beam resonators operating at high resonant frequencies.

• Proceedings of the Korean Vacuum Society Conference
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• 2009.08a
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• pp.245-245
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• 2009

• Proceedings of the KIEE Conference
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• 1993.11a
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• pp.192-194
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• 1993

In this paper, a silicon piezoresistive accelerometer of which the cantilevers have uniform thickness is designed and fabricated with SOI wafer. The accelerometer consists of a seismic mass and four cantilevers, and is fabricated mainly by the anisotropic etching method using EPW etchant. The fabrication processes are that of the frontside processes including the etching of the cantilevers and the doubleside alignment holes, the diffusion of the piezoresisters and patterning of the contact windows, and the metal connection process, and that of the backside processes including the etching of the shallow cavity and the seismic mass. Because of the uniformity of thickness, the performance of the accelerometer fabricated with SOI wafer is expected to be better than that of accelerometer fabricated by the time-controlled etching method.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.31 no.1 s.256
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• pp.50-54
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• 2007

Nickel nano and microstructures are fabricated with simple process. The fabrication process consists of nickel deposition, lithography, nickel ion etching and plasma ashing. Well-aligned nickel nanowalls and nickel self-encapsulated microchannels were fabricated. We found that the ion etching condition as a key fabrication process of nickel nanowalls and self-encapsulated microchannels, i.e., 40 sccm Ar flow, 550 W RF power, 15 mTorr working pressure, and $20^{\circ}C$ water cooled platen without using He backside cooling unit and with using it, respectively. We present the experimental results and discuss the formational conditions and the effect of nickel redeposition on the fabrication of nickel nano and microstructures.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.38 no.9
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• pp.967-972
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• 2014

The good light permeability and hardness of glass allow it to be used in various fields. Non-conventional machining methods have been used for glass machining because of its brittle properties. As one non-contact machining method, a laser has advantages that include a high machining speed and the fact that no tool making is required. However, glass has light permeability. Thus, the use of a laser to machine glass has limitations. A nanosecond pulse laser can be used at low power for laser-induced backside wet etching, which is an indirect method. In previous studies, a short-wave laser that had good light absorption but a high price was used. In this study, a near-infrared laser was used to test the possibility of glass micro-machining. In particular, when deeper machining was conducted on a glass structure, more problems could result. To solve these problems, microstructure manufacturing was conducted using ultrasonic vibration.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.833-836
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• 2005

Nano-gap trench is fabricated by the novel electrochemical etching technique using forward biased PN junction formed at the backside of the wafer. PN junction is formed using boron nitride wafer and the concentration of the boron doping is the high value of $1{\times}10^{19}$ $cm^{-3}$. The electro-chemical etching is performed in the 5% HF solution under the forward bias voltage of $1{\sim}2V$. The relationship between the etch rate of the trench and the voltage of the forward bias is investigated and the dependence of the gap for the voltage also examined. The etch rate increase from 0.027 ${\mu}m/min$ to 0.031 ${\mu}m/min$ as the value of the applied voltage increase from 1V to 2V, but the the gap is kept constant value of 40 nm.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.8 no.1
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• pp.117-123
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• 1998

We investigated the effect of mechanical backside damage in Czochralski grown silicon wafer. The intensity of mechanical damage was evaluated by minority carrier recombination lifetime by laser excitation/microwave reflection photoconductivity decay method, photo-acoustic displacement method, X-ray section topography, and wet oxidation/preferential etching methods. The data indicate that the higher the mechanical damage intensity, the lower the minority carrier lifetime, and the photo-acoustic displacement values increased proportionally, and it was at Grade 1: Grade 2:Grade 3 = 1:19.6:41 that the normalized relative quantization ratio of excess photo-acoustic displacement in damaged wafer was calculated, which are normalized to the excess PAD from sample Grade 1.

• Journal of Sensor Science and Technology
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• v.4 no.1
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• pp.64-71
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• 1995

We have developed a silicon etching method by which highly doped layers are selectively etched using stain etching technique. Current supply to the backside contact of silicon wafer and special reactor are not required in this method. Therefore this method is much simpler than anodic reaction method and could be applied to standard VLSI process. In addition, highly doped layers of several wafer structures, including the structures where conventional anodic reaction method cannot be used, could be preferentially etched by this technique. We have also fabricated micromechanical structures such as cantilevers and air-bridges on the $n/n^{+}/n$ wafer and air-bridges on the $p/p^{+}$ wafer using this stain etching technique.

• Journal of the Semiconductor & Display Technology
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• v.2 no.1
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• pp.15-19
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• 2003

Spin etcher can process frontside and backside on the wafer, which is used for etching, stripping, cleaning and wafer reclamation. A new generation of spin etchers has been designed to meet 300mm wafer processing. The larger header and higher spin speed make vibration problem a severe problem in developing equipments. This study shows schematic process of solving practical vibration problems, where it is required to analyze the principal ca uses of vibration problem and find out the method of vibration reduction in spin etcher. The vibration under normal operation is measured in time domain and is analyzed in frequency domain. And modal parameters are obtained through modal test. Using the modal parameters from experiments, the model of finite element method is formulated. From diagnosis using many measurements and analyses, it can be shown that main cause of vibration is unbalance of head.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.559-560
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• 2006

The paper presents solutions of conventional piezoresistive pressure sensors. Deflection of diaphragm by external stress causes some problems, because the electrode is deposited on the diaphragm formed piezoresistors. To solve these problems, piezoresistors is formed by two implantation steps. To fabricate diaphragm, the backside silicon etching step is done by immersing the wafer into TMAH solution. $30{\mu}m$ thick diaphragm is obtained. Sensitivity of the piezoresistive pressure sensor fabricated is 48.6 mV/V-psi.