• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.83-83
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• 2008

Metal-oxide-silicon-on-insulator (MOSOI) structures were fabricated to study the effect caused by reactive ion etching (RIE) and sacrificial oxidation process on silicon-on-insulator (SOI) layer. The MOSOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching treatment. The measured C-V curves were compared to the numerical results from 2-dimensional (2-D) simulations. The measurements revealed that the profile of C-V curves significantly changes depending on the SOI surface condition of the MOSOI capacitors. The shift in the measured C-V curves, due to the difference of the fixed oxide charge ($Q_f$), together with the numerical simulation analysis and atomic force microscopy (AFM) analysis, allowed extracting the fixed oxide charges ($Q_f$) in the structures as well as 2-D carrier distribution profiles.

• Transactions on Electrical and Electronic Materials
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• v.11 no.4
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• pp.190-193
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• 2010

This report covers an effective fabrication method of graphene nanoribbon for top-gated field effect transistors (FETs) utilizing electron beam lithography with a bi-layer resists (XR-1541/poly methtyl methacrylate) process. To improve the variation of the gating properties of FETs, the residues of an e beam resist on the graphene channel are successfully taken off through the combination of reactive ion etching and a lift-off process for the XR-1541 bi-layer. In order to identify the presence of graphene structures, atomic force microscopy measurement and Raman spectrum analysis are performed. We believe that the lift-off process with bi-layer resists could be a good solution to increase gate dielectric properties toward the high quality of graphene FETs.

• Journal of the Korean Vacuum Society
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• v.13 no.3
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• pp.120-126
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• 2004

A damage-reduced trench was investigated in view of the defect distribution along trench sidewall and bottom using high resolution transmission electron microscopy, which was formed by HBr plasma and additive gases in magnetically enhanced reactive ion etching system. Adding $O_2$ and other additive gases into HBr plasma makes it possible to eliminate sidewall undercut and lower surface roughness by forming the passivation layer of lateral etching. To reduce the RIE induced damage and obtain the fine shape trench corner rounding, we investigated the hydrogen annealing effect after trench formation. Silicon atomic migration on trench surfaces using high temperature hydrogen annealing was observed with atomic scale view. Migrated atoms on crystal surfaces formed specific crystal planes such as (111), (113) low index planes, instead of fully rounded comers to reduce the overall surface energy. We could observe the buildup of migrated atoms against the oxide mask, which originated from the surface migration of silicon atoms. Using this hydrogen annealing, more uniform thermal oxide could be grown on trench surfaces, suitable for the improvement of oxide breakdown.

• Journal of the Korean Vacuum Society
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• v.20 no.1
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• pp.63-69
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• 2011

In this study, we report on the novel lithographic patterning method to fabricate organic thin film field effect transistors (OTFTs) based on photo and e-beam lithography with well-known silicon technology. The method is applied to fabricate pentacene-based organic field effect transistors. Owing to their solubility, sub-micron sized patterning of P3HT and PEDOT has been well established via micromolding in capillaries and inkjet printing techniques. Since the thermally deposited pentacene cannot be dissolved in solvents, other approach was done to fabricate pentacene FETs with a very short channel length (~30 nm), or in-plane orientation of pentacene molecules by using nanometer-scale periodic groove patterns as an alignment layer for high-performance pentacene devices. Here, we introduce $Al_2O_3$ film grown via atomic layer deposition method onto pentacene as a passivation layer. $Al_2O_3$ passivation layer on OTFTs has some advantages in preventing the penetration of water and oxygen and obtaining the long-term stability of electrical properties. AZ5214 and ma N-2402 were used as a photo and e-beam resist, respectively. A few micrometer sized lithography patterns were transferred by wet and dry etching processes. Finally, we fabricated micron sized pentacene FETs and measured their electrical characteristics.

• Korean Journal of Materials Research
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• v.29 no.11
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• pp.697-702
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• 2019

In this study, using a wet chemical process, we evaluate the effectiveness of different solution concentrations in removing layers from a solar cell, which is necessary for recovery of high-purity silicon. A 4-step wet etching process is applied to a 6-inch back surface field(BSF) solar cell. The metal electrode is removed in the first and second steps of the process, and the anti-reflection coating(ARC) is removed in the third step. In the fourth step, high purity silicon is recovered by simultaneously removing the emitter and the BSF layer from the solar cell. It is confirmed by inductively coupled plasma mass spectroscopy(ICP-MS) and secondary ion mass spectroscopy(SIMS) analyses that the effectiveness of layer removal increases with increasing chemical concentrations. The purity of silicon recovered through the process, using the optimal concentration for each process, is analyzed using inductively coupled plasma atomic emission spectroscopy(ICP-AES). In addition, the silicon wafer is recovered through optimum etching conditions for silicon recovery, and the solar cell is remanufactured using this recovered silicon wafer. The efficiency of the remanufactured solar cell is very similar to that of a commercial wafer-based solar cell, and sufficient for use in the PV industry.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.26.1-26.1
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• 2011

We investigated the atomic layer deposition (ALD) process for nitrogen doped ZnO and the application for n-ZnO : N/p-Si (NW) coaxial hetero-junction photodetectors. ALD ZnO:N was deposited using diethylzinc (DEZ) and diluted $NH_4OH$ at $150^{\circ}C$ of substrate temperature. About 100~300 nm diameter and 5 um length of Si nanowires array were prepared using electroless etching technique in 0.108 g of $AgNO_3$ melted 20 ml HF liquid at $75^{\circ}C$. TEM images showed ZnO were deposited on densely packed SiNW structure achieving extraordinary conformality. When UV (360 nm) light was illuminated on n-ZnO:N/p-SiNW, I-V curve showed about three times larger photocurrent generation than film structure at 10 V reverse bias. Especially, at 660 nm wave length, the coaxial structure has 90.8% of external quantum efficiency (EQE) and 0.573 A/W of responsivity.

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2002.05a
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• pp.40-44
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• 2002

The motivation of this work is to use SAM(Self-Assembled Monolayer) for developing a rapid and flexible non-photolithographic nano-structure fabrication technique which can be utilized in micro-machining of metals as well as silicon-based materials. The fabrication technique implemented in this work consists of a two-step process, namely, mechanical scribing followed by chemical etching. From the experimental results, it was found that thiol on copper surface could be removed even under a few nN normal load. The nano-tribological characteristics of thiol-SAM on various metals were largely dependent on the native oxide layer of metals. Based on these findings, nano-patterns with sub-micrometer width and depth on metal surfaces such as Cu, Au and Ag could be obtained using a diamond-coated tip.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.84-84
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• 2010

In this study, we report on the novel lithographic patterning method to fabricate organic-semiconductor devices based on photo and e-beam lithography with well-known silicon technology. The method is applied to fabricate pentacene-based organic field effect transistors. Owing to their solubility, sub-micron sized patterning of P3HT and PEDOT has been well established via micromolding in capillaries (MIMIC) and inkjet printing techniques. Since the thermally deposited pentacene cannot be dissolved in solvents, other approach was done to fabricate pentacene FETs with a very short channel length (~30nm), or in-plane orientation of pentacene molecules by using nanometer-scale periodic groove patterns as an alignment layer for high-performance pentacene devices. Here, we introduce the atomic layer deposition of $Al_2O_3$ film on pentacene as a passivation layer. $Al_2O_3$ passivation layer on OTFTs has some advantages in preventing the penetration of water and oxygen and obtaining the long-term stability of electrical properties. AZ5214 and ma N-2402 were used as a photo and e-beam resist, respectively. A few micrometer sized lithography patterns were transferred by wet and dry etching processes. Finally, we fabricated sub-micron sized pentacene FETs and measured their electrical characteristics.

• Journal of the Society of Cosmetic Scientists of Korea
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• v.34 no.4
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• pp.269-274
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• 2008

In this study we successfully altered the structural characteristics of the mica surface and were able to control oil-absorption by using the microwave enhanced etching (MEE) technique, which has originally been used in semiconductor industry. When microwave energy is applied to the mica, the surface of the mica is etched in a few minutes. As the result of etching, oil-absorption of the mica was enhanced and surface whiteness was improved by modifying the silicon dioxide layer. Additionally, the high whiteness was maintained even though the etched mica absorbed the sebum or sweat. The surface modification of mica was performed by microwave irradiation after the treatment of hydrofluoric acid. The degree of etching was regulated by acid concentration, irradiation time, the amount of energy and slurry concentration. The surface morphology of the etched mica appears to be the shape of the 'Moon'. The characteristics of surface area and roughness were examined by Brunauer-Emmett-Teller (BET) surface area analysis, atomic force microscopy (AFM), scanning electron microscopy (SEM), spectrophotometer and goniophotometer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.37-40
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• 2003

Amorphous $Al_2O_3$ nanotubes have been fabricated by utilizing the ZnO nanowires as template with wet etching method. ZnO nanowires synthesized by thermal evaporation are conformally coated with $Al_2O_3$ by atomic-layer deposition(ALD) method. The $Al_2O_3$-coated ZnO nanowires are of core-shell structure; ZnO core nanowires and $Al_2O_3$ shells. When the $ZnO/Al_2O_3$ core-shell structure is dipped in $H_3PO_4$ solution at $25^{\circ}C$ for a 6 min, the core ZnO materials are completely etched, and only $Al_2O_3$ nanotubes are remained. This nanotube fabrication is technically easier than others, and simply approachable. Transmission electron microscopy shows that the $Al_2O_3$ nanotubes have various thicknesses that can be controlled.