• Title/Summary/Keyword: Analog-to-digital converter

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A Low Power Current-Mode 12-bit ADC using 4-bit ADC in cascade structure (4비트 ADC 반복구조를 이용한 저전력 전류모드 12비트 ADC)

  • Park, So-Youn;Kim, Hyung-Min;Lee, Daniel-Juhun;Kim, Seong-Kweon
    • The Journal of the Korea institute of electronic communication sciences
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    • v.14 no.6
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    • pp.1145-1152
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    • 2019
  • In this paper, a low power current mode 12-bit ADC(: Analog to Digital Converter) is proposed to mix digital circuits and analog circuits with the advantages of low power consumption and high speed operation. The proposed 12 bit ADC is implemented by using 4-bit ADC in a cascade structure, so its power consumption can be reduced, and the chip area can be reduced by using a conversion current mirror circuit. The proposed 12-bit ADC is SK Hynix 350nm process, and post-layout simulation is performed using Cadence MMSIM. It operates at a supply voltage of 3.3V and the area of the proposed circuit is 318㎛ x 514㎛. In addition, the ADC shows the possibility of operating with low power consumption of 3.4mW average power consumption in this paper.

Design of a 25 mW 16 frame/s 10-bit Low Power CMOS Image Sensor for Mobile Appliances

  • Kim, Dae-Yun;Song, Min-Kyu
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.2
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    • pp.104-110
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    • 2011
  • A CMOS Image Sensor (CIS) mounted on mobile appliances requires low power consumption due to limitations of the battery life cycle. In order to reduce the power consumption of CIS, we propose novel power reduction techniques such as a data flip-flop circuit with leakage current elimination and a low power single slope analog-to-digital (A/D) converter with a sleep-mode comparator. Based on 0.13 ${\mu}m$ CMOS process, the chip satisfies QVGA resolution (320 ${\times}$ 240 pixels) that the cell pitch is 2.25 um and the structure is a 4-Tr active pixel sensor. From the experimental results, the performance of the CIS has a 10-b resolution, the operating speed of the CIS is 16 frame/s, and the power dissipation is 25 mW at a 3.3 V(analog)/1.8 V(digital) power supply. When we compare the proposed CIS with conventional ones, the power consumption was reduced by approximately 22% in the sleep mode, and 20% in the active mode.

10-bit Source Driver with Resistor-Resistor-String Digital to Analog Converter Using Low Temperature Poly-Si TFTs

  • Kang, Jin-Seong;Kim, Hyun-Wook;Sung, Yoo-Chang;Kwon, Oh-Kyong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.696-699
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    • 2008
  • A 10-bit source driver using low temperature poly-silicon(LTPS) TFTs is developed. To reduce the DAC area, the DAC structure including two 5-bit resistor-string DACs and analog buffer, which has analog adder is proposed. The source driver is fabricated using LTPS process and its one channel area is $3,200{\mu}m\;{\times}\;260{\mu}m$. The simulated INL and DNL of output voltages are less than 3 LSB and 1 LSB, respectively.

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Digitally Controlled Single-inductor Multiple-output Synchronous DC-DC Boost Converter with Smooth Loop Handover Using 55 nm Process

  • Hayder, Abbas Syed;Park, Young-Jun;Kim, SangYun;Pu, Young-Gun;Yoo, Sang-Sun;Yang, Youngoo;Lee, Minjae;Hwang, Keum Choel;Lee, Kang-Yoon
    • Journal of Power Electronics
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    • v.17 no.3
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    • pp.821-834
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    • 2017
  • This paper reports on a single-inductor multiple-output step-up converter with digital control. A systematic analog-to-digital-controller design is explained. The number of digital blocks in the feedback path of the proposed converter has been decreased. The simpler digital pulse-width modulation (DPWM) architecture is then utilized to reduce the power consumption. This architecture has several advantages because counters and a complex digital design are not required. An initially designed unit-delay cell is adopted recursively for the construction of coarse, intermediate, and fine delay blocks. A digital limiter is then designed to allow only useful code for the DPWM. The input voltage is 1.8 V, whereas output voltages are 2 V and 2.2 V. A co-simulation was also conducted utilizing PowerSim and Matlab/Simulink, whereby the 55 nm process was employed in the experimental results to evaluate the performance of the architecture.

Development of One-channel Gamma ray spectroscope for Automatic Radiopharmaceutical Synthesis System (방사성 의약품 자동합성장치용 단채널 감마선 분광기 보드의 설계 및 제작)

  • Song, Kwanhoon;Kim, Kwangsoo
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.4
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    • pp.193-200
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    • 2014
  • In this paper, the prototype of one-channel gamma-ray spectroscope for automatic radiopharmaceutical systhesis system was designed and characterized. The prototype employed CZT (CdZnTe) spear detector for gamma-ray detection and employed analog-type signal processing method. A radioactive sample Co-60 was used for measuring performance of the gamma-ray spectroscope and energy spectrum is gained with bandwidth of 1173keV. The analog board is made up of SF (shaping filter) and PHA (peak and hold amplifier) for shaping CZT output signal appropriately and ADC (analog to digital converter) and FPGA (field programmable gate array) for drawing gamma-ray spectrum by counting the digitalized gamma-ray signal data.

Development and Verification of Digital EEG Signal Transmission Protocol (디지털 뇌파 전송 프로토콜 개발 및 검증)

  • Kim, Do-Hoon;Hwang, Kyu-Sung
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38C no.7
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    • pp.623-629
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    • 2013
  • This paper presents the implementation result of the EEG(electroencephalogram) signal transmission protocol and its test platform. EEG measured by a dry-type electrode is directly converted into digital signal by ADC(analog-to-digital converter). Thereafter it is transferred DSP(digital signal processor) platform by $I^2C$(inter-integrated circuit) protocol. DSP conducts the pre-processing of EEG and extracts feature vectors of EEG. In this work, we implement the $I^2C$ protocol with 16 channels by using 10 or 12-bit ADC. In the implementation results, the overhead ratio for the 4 bytes data burst transmission measures 2.16 and the total data rates are 345.6 kbps and 414.72 kbps with 10-bit and 12-bit 1 ksps ADC, respectively. Therefore, in order to support a high speed mode of $I^2C$ for 400 kbps, it is required to use 16:1 and $(8:1){\times}2$ ratios for slave:master in 10-bit ADC and 12-bit ADC, respectively.

Design and Implementation of Audio Data In/Out Control Functions based on MOST150 Network (MOST150 네트워크 환경에서 Audio 데이터 입출력 제어 기능의 설계 및 구현)

  • Cheon, Seung-Hwan;Kwok, Gil-Bong;Jang, Si-Woong
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.05a
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    • pp.314-317
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    • 2012
  • 최근 차량의 멀티미디어 장치들이 증가하면서 이 장치들을 광 네트워크로 연결하여 멀티미디어 데이터를 송 수신해서 사용할 수 있는 MOST(Media Oriented Systems Transport) 네트워크를 적용한 차량들이 늘어나고 있다. MOST 네트워크는 최근 자동차 멀티미디어 시스템에 넓게 사용되고 있는 통신 시스템으로서, 동기 및 비동기 데이터를 동시에 전송할 수 있고, 최근에는 150Mbps를 전송할 수 있는 MOST150 네트워크를 이용한 연구가 활발히 진행되고 있다. 본 논문에서는 MOST150 네트워크에서 Audio 데이터 입출력을 제어하기 위한 알고리즘을 설계 및 구현하였다. Audio 데이터를 제어하는 방식은 ADC(Analog to Digital Converter)를 통해 Audio 데이터가 들어오면 IOC(IO Companion)를 통해 INIC으로 Audio데이터를 전달한다. INIC은 MOST150 네트워크로 데이터를 전송하고 그렇게 보내진 Audio 데이터를 MOST150 네트워크 내부의 다른 장치에서 INIC을 통해 데이터를 수신하여 DAC(Digital to Analog Converter)를 통해 Audio 장치에서 소리가 나는 것을 테스트하여 정상적으로 동작함을 확인하였다.

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A Single-Ended ADC with Split Dual-Capacitive-Array for Multi-Channel Systems

  • Cho, Seong-Jin;Kim, Ju Eon;Shin, Dong Ho;Yoon, Dong-Hyun;Jung, Dong-Kyu;Jeon, Hong Tae;Lee, Seok;Baek, Kwang-Hyun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.5
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    • pp.504-510
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    • 2015
  • This paper presents a power and area efficient SAR ADC for multi-channel near threshold-voltage (NTV) applications such as neural recording systems. This work proposes a split dual-capacitive-array (S-DCA) structure with shifted input range for ultra low-switching energy and architecture of multi-channel single-ended SAR ADC which employs only one comparator. In addition, the proposed ADC has the same amount of equivalent capacitance at two comparator inputs, which minimizes the kickback noise. Compared with conventional SAR ADC, this work reduces the total capacitance and switching energy by 84.8% and 91.3%, respectively.

Controller Scheduling and Performance Analysis for Multi-Motor Control (다중 모터 제어를 위한 제어기 스케쥴링 및 성능 분석)

  • Kwon, Jae-Min;Lee, Kyung-Jung;Ahn, Hyun-Sik
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.15 no.6
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    • pp.71-77
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    • 2015
  • In this paper, we propose a scheduling method for signal measurement and control algorithm execution in a multi-motor drive controller. The multi-motor controller which is used for vehicle control receives position/velocity command and performs position/velocity control and current control. Internal resource allocation and control algorithm execution timing are very important when one microcontroller is used for multi-motor drives. The control performance of the velocity control system is verified by varying ADC(Analog to Digital Converter) conversion timing and algorithm execution timing using real experiments.

Development of the Inductive Proximity Sensor Module for Detection of Non-contact Vibration (비접촉 진동 검출을 위한 유도성 근접센서모듈 개발)

  • Nam, Si-Byung;Yun, Gun-Jin;Lim, Su-Il
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.5
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    • pp.61-71
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    • 2011
  • To measure the fatigue of metallic objects at high speed vibration while non-contact precision displacement measurement on how to have a lot of research conducted. Noncontact high-speed vibration detection sensor of the eddy current sensors and laser sensors are used, but it is very expensive. Recently, High-speed vibrations detection using an inexpensive inductive sensor to have been studied, but is still a beginner. In this paper, a new design of an inexpensive inductive proximity sensor has been suggested in order to measure high frequency dynamic displacements of metallic specimens in a noncontact manner. Detection of the existing inductive sensors, detection, integral, and amplified through a process to detect the displacement noise due to weak nature of analog circuits and integral factor in the process of displacement detection is slow. The proposed method could be less affected by noise, the analog receive and high-speed signal processing is a new way, because AD converter (Analog to Digital converter) without using the vibration frequency signals directly into digital signals are converted. In order to evaluate the sensing performance, The proposed sensor module using non-contact vibration signals were detected while shaker vibration frequencies from 30Hz to 1,100 Hz at intervals of vibrating metallic specimens. Experimental results, Vibration frequency detection range of the metallic specimins within close proximity to contactless 5mm could be measured from DC to 1,100Hz and vibration amplitude of the resolution was $20{\mu}m$. Therefore, the proposed non-contact inductive sensor module for precision vibration detection sensor is estimated to have sufficient performance.