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http://dx.doi.org/10.7840/kics.2013.38C.7.623

Development and Verification of Digital EEG Signal Transmission Protocol  

Kim, Do-Hoon (전자부품연구원 실감정보플랫폼연구센터)
Hwang, Kyu-Sung (경일대학교 사이버보안학과)
Abstract
This paper presents the implementation result of the EEG(electroencephalogram) signal transmission protocol and its test platform. EEG measured by a dry-type electrode is directly converted into digital signal by ADC(analog-to-digital converter). Thereafter it is transferred DSP(digital signal processor) platform by $I^2C$(inter-integrated circuit) protocol. DSP conducts the pre-processing of EEG and extracts feature vectors of EEG. In this work, we implement the $I^2C$ protocol with 16 channels by using 10 or 12-bit ADC. In the implementation results, the overhead ratio for the 4 bytes data burst transmission measures 2.16 and the total data rates are 345.6 kbps and 414.72 kbps with 10-bit and 12-bit 1 ksps ADC, respectively. Therefore, in order to support a high speed mode of $I^2C$ for 400 kbps, it is required to use 16:1 and $(8:1){\times}2$ ratios for slave:master in 10-bit ADC and 12-bit ADC, respectively.
Keywords
Electroencephalogram(EEG); dry-type electrode; FPGA; DSP; $I^2C$;
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