• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.3
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• pp.193-196
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• 2001

For wide locking range, an analog delay locked loop (DLL) was designed with the selective phase inversion scheme and the variable number of delay elements. The number of delay elements was determined adaptively depending on the clock cycle time. During the analog fine locking stage, a self-initializing 3-state phase detector was used to avoid the initial state problem associated with the conventional 3-state phase detector. With these schemes, the locking range of analog DLL was increased by four times compared to the conventional scheme according to the simulation results.

• Fire Science and Engineering
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• v.30 no.5
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• pp.108-115
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• 2016

Fire detectors play an important role in alerting the related people to the initial stages of fire to protect assets and life. Therefore, the performance in detecting fires in the early stages without the risk of false alarms is important. Owing to a recent revision of the national fire safety standards to install smoke detectors in living rooms used for sleeping, staying, hospitalizing in apartment house/efficiency apartment/lodging facility/medical facility/facility for elderly and young, the application of smoke detectors is increasing. On the other hand, there is lack of research in preventing false alarms. This study improved algorithms to prevent false alarms in analog photoelectric smoke detector's due to sudden dust and better classify pollution and fire signals through a self-compensatory function. Through this study, alternatives are suggested to reduce the number of false alarms of Analog Photoelectric smoke detectors, and prevent financial losses due to false alarms.

• Fire Science and Engineering
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• v.24 no.4
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• pp.1-11
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• 2010

This paper describes a design and implementation of an analog detector and a fire alarm system with recent technology on information and communication. A hierarchical architecture design from the detector to the main system enables to accommodate medium to large size buildings located nearby or far-away. And a software design from communication protocol to application program handles large amount of events efficiently to show information on a large LCD. A PC-based alarm system provides higher speed and larger capacity in a large LCD screen compared with foreign microprocessor-based small screen systems. Thus, very large buildings with several thousands of analog detectors can be easily covered in a single system. When an alarm occurs, a staff alarm scenario specially attempted only in the system is considered to play a major role to distinguish a real fire from unwanted alarms.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.377-380
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• 2000

In this paper, a new adaptive linearizer architecture with the predistorter is proposed. In the M.Ghaderi's paper, two analog predistorters and an envelope detector are used. Analog circuits for the analog predistorter and the envelope detector can cause imperfection and inaccuracy of the system and make circuits more complex. To solve those problems, most of processes including the predistortion are made by the DSP. The RLS algorithm is applied so that the errors between power amplifier output signals through the postdistorters and predistorted input signals can be converged to the global minimum.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.465-466
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• 2006

In this paper, novel analog duty cycle corrector (DCC) with a digital duty error detector is proposed. The digital duty error detector measures the duty error of the clock and converts it into a digital code. This digital code is then used to accurately correct the duty ratio by adaptively steering the charge-pump current. The proposed duty cycle corrector was implemented using an 80nm DRAM process with 1.8V supply voltage. The simulation result shows that the proposed duty cycle corrector improves the settling time up to $70{\sim}80%$ at 500MHz clock frequency for the same duty correction accuracy as the conventional analog DCC.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.6
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• pp.923-928
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• 1986

This paper describes the design and fabrication of a high performance digital tuning analog component integrated circuit that contains a television station detector and decoders(H and L types). When the comparator level sampling method is used, this integrated circuit can be used as a stable channel selector for an external circuit with very large signal variation. It has been fabricated using the SST bipolar standard process and its chip size is 2.2x2.1mm\ulcorner As a result, we have succeeded in fabricating the IC that satisfies the D.C characteristics, and the channel station detector and decoder function.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1983.10a
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• pp.32-34
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• 1983

In this paper, an analog optical filter link is evaluated for the transmission of baseband video signals over a single fiber. LED and PIN photo diode are used as the optical source and the detector. Frequency response of the system, DP, DG and SNR are measured.

• Journal of Sensor Science and Technology
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• v.31 no.2
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• pp.115-119
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• 2022

A readout circuit for a mercury-cadmium-telluride (MCT)-amplified mid-wave infrared (IR) photodetector was realized and applied to noncontact chemical agent detectors based on a quantum cascade laser (QCL). The QCL emitted 250 times for each wavelength in 0.2-㎛ steps from 8 to 12 ㎛ with a frequency of 100 kHz and duty ratio of 10%. Because of the nonconstant QCL emission power during on-duty, averaging the photodetector signals is essential. Averaging can be performed in digital back-end processing through a high-speed analog-to-digital converter (ADC) or in analog front-end processing through an integrator circuit. In addition, it should be considered that the 250 IR data points should be completely transferred to a PC during each wavelength tuning period of the QCL. To average and minimize the IR data, we designed a readout circuit using the analog front-end processing method. The proposed readout circuit consisted of a switched-capacitor integrator, voltage level shifter, relatively low-speed analog-to-digital converter, and micro-control unit. We confirmed that the MCT photodetector signal according to the QCL source can be accurately read and transferred to the PC without omissions.

• The Journal of the Korea Contents Association
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• v.13 no.10
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• pp.54-61
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• 2013

This paper presents a simplified hardware based edge detection circuit which is based on an analog correlator combining with the neighbor pixels in CMOS image sensor. A pixel element of the edge detector consists of an active pixel sensor and an analog correlator circuit which connects two neighbor pixels. The edge detector shares a comparator on each column that the comparator decides an edge of the target pixel with an adjustable reference voltage. The circuit detects image edge from CIS directly that reduces area and power consumption 4 times and 20%, respectively, compared with the previous works. And also it has advantage to regulate sensitivity of the edge detection because the threshold value is able to control externally. The fabricated chip has 34% of fill factor and 0.9 ${\mu}W$ of power per a pixel under 0.18 ${\mu}m$ CMOS technology.

• Journal of the Institute of Convergence Signal Processing
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• v.7 no.4
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• pp.184-188
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• 2006

This paper presents DSP based narrow band satellite communication signal power detector for tracking control of mobile satellite antenna system. An analog filter based conventional power detector has poor performance due to frequency drift of carrier. Also, it is very difficult to change an analog filter bandwidth according to changed bandwidth of transmitted signal. To solve these difficulties, we proposed DSP based signal power detector, which is easy to change bandwidth of filter and to match shifted frequency of carrier. The proposed signal power detector consists of a FFT function to measure frequency drift of carrier, a programmable filter bank function to limit of received signal bandwidth and a power calculation function to measure power of filtered signal in 12-bit linear scale. Test results of implemented signal power detector, based on TMS320C5402 DSP, showed that it satisfied required functions and performances and properly operated.