A Study of Digital Adaptive Predistorter Linearizer

디지틀 적응 전치왜곡 선형화기에 관한 연구

  • 이세현 (한양대학교 전자통신공학과) ;
  • 강종필 (한양대학교 전자통신공학과) ;
  • 이경우 (한양대학교 전자통신공학과) ;
  • 민이규 (한양대학교 전자통신공학과) ;
  • 강경원 (한양대학교 전자통신공학과) ;
  • 김동현 (한양대학교 전자통신공학과) ;
  • 이상설 (한양대학교 전자통신공학과) ;
  • 안광은 (LG전자(주))
  • Published : 2000.11.01

Abstract

In this paper, a new adaptive linearizer architecture with the predistorter is proposed. In the M.Ghaderi's paper, two analog predistorters and an envelope detector are used. Analog circuits for the analog predistorter and the envelope detector can cause imperfection and inaccuracy of the system and make circuits more complex. To solve those problems, most of processes including the predistortion are made by the DSP. The RLS algorithm is applied so that the errors between power amplifier output signals through the postdistorters and predistorted input signals can be converged to the global minimum.

Keywords