Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2000.11a
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- Pages.377-380
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- 2000
A Study of Digital Adaptive Predistorter Linearizer
디지틀 적응 전치왜곡 선형화기에 관한 연구
Abstract
In this paper, a new adaptive linearizer architecture with the predistorter is proposed. In the M.Ghaderi's paper, two analog predistorters and an envelope detector are used. Analog circuits for the analog predistorter and the envelope detector can cause imperfection and inaccuracy of the system and make circuits more complex. To solve those problems, most of processes including the predistortion are made by the DSP. The RLS algorithm is applied so that the errors between power amplifier output signals through the postdistorters and predistorted input signals can be converged to the global minimum.
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