• Journal of the Korean Mathematical Society
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• v.51 no.3
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• pp.495-507
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• 2014

Nielsen and Rege-Chhawchharia called a ring R right McCoy if given nonzero polynomials f(x), g(x) over R with f(x)g(x) = 0, there exists a nonzero element r ${\in}$ R with f(x)r = 0. Hong et al. called a ring R strongly right McCoy if given nonzero polynomials f(x), g(x) over R with f(x)g(x) = 0, f(x)r = 0 for some nonzero r in the right ideal of R generated by the coefficients of g(x). Subsequently, Kim et al. observed similar conditions on linear polynomials by finding nonzero r's in various kinds of one-sided ideals generated by coefficients. But almost all results obtained by Kim et al. are concerned with the case of products of linear polynomials. In this paper we examine the nonzero annihilators in the products of general polynomials.

• 제어로봇시스템학회:학술대회논문집
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• 1989.10a
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• pp.881-883
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• 1989

Aperiodicity of interval polynomials is studied. Aperiodicity is normally defined as a property such that all the roots are simple and negative real, while interval polynomials are referred to as polynomials with coefficients lying within specified closed intervals on the real axis. Several conditions for aperiodicity, including an exact one, are derived. Comments on them are given in contrast to the work by Soh and Berger, who also considered the problem with a modified definition of aperiodicity.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.1_2
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• pp.51-58
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• 2004

Most of pubic-key cryptosystems are built on the basis of arithmetic operations defined over the finite field GF$GF(2^m)$ .The other operations of finite fields except addition can be computed by repeated multiplications. Therefore, it is very important to implement the multiplication operation efficiently in public-key cryptosystems. We propose an efficient bit-parallel normal basis multiplier for$GF(2^m)$ fields defined by All-One Polynomials. The gate count and time complexities of our proposed multiplier are lower than or equal to those of the previously proposed multipliers of the same class. Also, since the architecture of our multiplier is regular, it is suitable for VLSI implementation.

• East Asian mathematical journal
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• v.26 no.3
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• pp.351-363
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• 2010

We introduce a special class of real recurrent polynomials $f_m$$($m{\geq}1$) of degree m+1, with positive roots $s_m$, which are decreasing as m increases. The first root $s_1$, as well as the last one denoted by $s_{\infty}$ are expressed in closed form, and enclose all $s_m$ (m > 1). This technique is also used to find weaker than before [6] sufficient convergence conditions for some popular iterative processes converging to solutions of equations.

• The Pure and Applied Mathematics
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• v.24 no.2
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• pp.69-77
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• 2017

If q(z) is a polynomial of degree n with all zeros in the unit circle, then the self-reciprocal polynomial $q(z)+x^nq(1/z)$ has all its zeros on the unit circle. One might naturally ask: where are the zeros of $q(z)+x^nq(1/z)$ located if q(z) has different zero distribution from the unit circle? In this paper, we study this question when $q(z)=(z-1)^{n-k}(z-1-c_1){\cdots}(z-1-c_k)+(z+1)^{n-k}(z+1+c_1){\cdots}(z+1+c_k)$, where $c_j$ > 0 for each j, and q(z) is a 'zeros dragged' polynomial from $(z-1)^n+(z+1)^n$ whose all zeros lie on the imaginary axis.

• Proceedings of the Korean Information Science Society Conference
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• 2003.04a
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• pp.272-274
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• 2003

유한체 GF(2$^{m}$ ) 상의 산술 연산 중 곱셈 연산의 효율적인 구현은 암호이론 분야의 어플리케이션에서 매우 중요하다. 본 논문에서는 All-One 다항식에 의해 정의된 GF(2$^{m}$ ) 상의 효율적인 Bit-Parallel 정규기저 곱셈기를 제안한다. 게이트 및 시간 면에서 본 논문의 곱셈기의 complexity는 이전에 제안된 같은 종류의 곱셈기 보다 낮거나 동일하다. 그리고 본 논문의 곱셈기는 이전 곱셈기 보다 더 모듈적이어서 VLSI 구현에 적합하다.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.7 s.349
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• pp.115-121
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• 2006

The efficiency of the multiplier largely depends on the representation of finite filed elements such as normal basis, polynomial basis, dual basis, and redundant representation, and so on. In particular, the redundant representation is attractive since it can simply implement squaring and modular reduction. In this paper, we propose an efficient bit-parallel multiplier for GF(2m) defined by an irreducible all-one polynomial using a redundant representation. We modify the well-known multiplication method which was proposed by Karatsuba to improve the efficiency of the proposed bit-parallel multiplier. As a result, the proposed multiplier has a lower space complexity compared to the previously known multipliers using all-one polynomials. On the other hand, its time complexity is similar to the previously proposed ones.

• Bulletin of the Korean Mathematical Society
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• v.50 no.3
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• pp.983-991
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• 2013

For each real number $n$ > 6, we prove that there is a sequence $\{pk(n,z)\}^{\infty}_{k=1}$ of fourth degree self-reciprocal polynomials such that the zeros of $p_k(n,z)$ are all simple and real, and every $p_{k+1}(n,z)$ has the largest (in modulus) zero ${\alpha}{\beta}$ where ${\alpha}$ and ${\beta}$ are the first and the second largest (in modulus) zeros of $p_k(n,z)$, respectively. One such sequence is given by $p_k(n,z)$ so that $$p_k(n,z)=z^4-q_{k-1}(n)z^3+(q_k(n)+2)z^2-q_{k-1}(n)z+1$$, where $q_0(n)=1$ and other $q_k(n)^{\prime}s$ are polynomials in n defined by the severely nonlinear recurrence $$4q_{2m-1}(n)=q^2_{2m-2}(n)-(4n+1)\prod_{j=0}^{m-2}\;q^2_{2j}(n),\\4q_{2m}(n)=q^2_{2m-1}(n)-(n-2)(n-6)\prod_{j=0}^{m-2}\;q^2_{2j+1}(n)$$ for $m{\geq}1$, with the usual empty product conventions, i.e., ${\prod}_{j=0}^{-1}\;b_j=1$.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.4
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• pp.36-42
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• 2002

In this paper, we proposed a multiplicative algorithm for two polynomials with all non-zero coefficients over finite field GF($P^m$). Using the proposed multiplicative algorithm, we constructed the multiplier of modular architecture with parallel in-output. The proposed multiplier is composed of $(m+1)^2$ identical cells, each cell consists of one mod(p) additional gate and one mod(p) multiplicative gate. Proposed multiplier need one mod(p) multiplicative gate delay time and m mod(p) additional gate delay time not clock. Also, our architecture is regular and possesses the property of modularity, therefore well-suited for VLSI implementation.

• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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• 1995.11a
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• pp.200-210
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• 1995

Almost all hash functions suggested up till now provide security by using complicated operations on fixed size blocks, but still the security isn't guaranteed mathematically. The difficulty of making a secure hash function lies in the collision freeness, and this can be obtained from permutation polynomials. If a permutation polynomial has the property of one-wayness, it is suitable for a hash function. We have chosen Dickson polynomial for our hash algorithm, which is a kind of permutation polynomials. When certain conditions are satisfied, a Dickson polynomial has the property of one-wayness, which makes the resulting hash code mathematically secure. In this paper, a message digest algorithm will be designed using Dickson polynomial.