• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.503-506
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• 2004

In this paper, we suggest a new driving waveform for stable address discharge in AC PDP without the reduction of contrast ratio. To analyze the influence of cross-talk between discharge and non-discharge cells and verify that proposed waveform shows a stable address discharge, we measured the address discharge delay time. The proposed waveform shows the reduction of the cross-talk and concurrently the improvement of address voltage margin compared with those of selective reset waveform having one reset period in 1TV-Field..

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1185-1188
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• 2007

The address discharge characteristics by the various scan-low and common-bias voltages are investigated based on measured address discharge time lags and $V_t$ close-curve analysis. The scan-low voltages are changed under the same voltage difference between the X and Y electrodes during an address period. As the voltage difference between the scan and address electrodes is increased during an address period, the address discharge time lag is shortened but the background luminance is increased. It is found that the improved address discharge characteristics is caused by the effect of the higher external applied voltage during an address period than the accumulated wall charges during a reset period and the high background luminance can be prevented by applying an address-bias voltage during a rising-ramp period and low reset voltage.

• 한국전기전자재료학회논문지
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• 제25권12호
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• pp.1004-1008
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• 2012

The effect of address discharge characteristics by selective reset method is investigated to prevent the weakness of address discharge in the middle of a TV-field without increase of the black luminance. To reduce black luminance in AC PDP usually, the first subfield during one TV frame adopted the conventional rising ramp-reset waveform, whereas the other subfields adopted the subsidiary reset waveform without rising ramp type. As the wall charge for the address discharge was accumulated by only the rising ramp waveform during the first reset period, the wall charge on three electrodes was disappeared as time passed and the address discharge would be weakened in the rear subfields. To prevent a reduction of the address discharge characteristics without decrease the black luminance, the modified rising ramp reset waveform was adopted only in the sixth subfield. As a result, a modified driving method could improve the address discharge characteristics compared with selective reset driving scheme with almost the same black luminance.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1181-1184
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• 2007

The new self-priming addressing driving scheme was proposed to improve an address discharge time lag. It utilizes the priming effect maintaining the priming ramp discharge during an address period and the address discharge time lag is significantly improved. In this study, the basic characteristics of the priming ramp discharge are presented.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.412-415
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• 2008

It is known that the address discharge delay time during an address period strongly depends on the wall charge leakage. It was observed that the wall charge leakage during an address period is related to both the address width and the ambient temperature. Accordingly, the effects of address electrode width on the address discharge and wall voltage variation during an address period were examined under variable temperatures.

• 전자공학회논문지
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• 제52권1호
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• pp.135-139
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• 2015

플라즈마 디스플레이 패널의 각 부화면 시간동안 기입 방전의 지연시간을 각각 조사하였고 오방전이 발생하지 않는 범위내에서 추가 주사전압의 높이를 다르게 인가하여 모든 부화면 시간동안 기입방전 지연시간을 단축시키기 위한 수정된 구동방법을 제시한다. AC PDP에서 첫번째 초기화 기간 동안 주사전극에 높은 상승 경사파 전압을 인가하여 약한 플라즈마 방전이 발생하고 셀 내부에서 프라이밍 입자와 벽전하 생성을 유도한다. 생성된 벽전하는 셀 내부 벽전압이 되므로 기입기간 중 기입전압과 더해져서 기입 방전을 일으킨다. 그러나 셀 내부의 벽전하는 시간이 지나면서 점차 소멸되므로 1 TV 프레임 시간 동안 각 부화면 시간동안 기입방전은 늦게 발생한다. 첫 번째 부화면 시간에는 초기화 기간 동안 상승 경사파를 갖는 높은 전압에 의해 벽전하가 많이 남아 있으므로 첫 번째 기입 방전은 다른 부화면 시간보다 빠르게 형성된다. 한편, 두 번째부터 마지막 부화면 시간까지의 기입 방전 생성시간은 셀 내의 벽전하 소멸에 의하여 점차적으로 늦어진다. 본 연구에서는 각 부화면 시간동안 기입방전의 시간지연을 조사하였고, 부화면 시간의 기입기간 마다 추가 주사전압을 다르게 인가하여 전체 기입방전지연시간을 단축시켰다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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• pp.613-616
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• 2007

Characteristics of dark image retention and address discharge time lag were investigated simultaneously. It was found that reset waveforms with low black luminance did not guarantee lower image retention. Improved address discharge time lag due to modified reset waveforms similarly did not show improved image retention. The address discharge time lag and the image retention are in a trade-off relation.

• 전기학회논문지
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• 제56권11호
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• pp.2004-2009
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• 2007

A new high-speed drive method for the plasma display panel is proposed. In this method, the address period is inserted for the rest period of the sustain pulses and the priming pulse is applied on the entire panel at the same time overlapping with the sustain period. The ramp shaped priming pulse can be made with a simple drive circuit in this technology and the stable sustain discharge can be induced even by a narrow scan pulse in help of the space charge generated from the address discharge. From the experiments, it is ascertained that the priming pulse hardly influences the sustain discharge. Moreover, the voltage margin of the sustain discharge is almost constant though that of the address discharge broadens with narrowing the scan pulse width. And, if the time interval between the scan pulse and the sustain pulse is within $6{\mu}s$, the voltage margin of the address and the sustain discharges are unaffected though the applied position of the scan pulse is changed. High-speed driving with the address pulse of $0.7{\mu}s$ width was achieved and the address voltage margin of 20V and the sustain voltage margin of 10V were obtained.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 C
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• pp.2156-2159
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• 2005

ADS(Address Display Period Separation) driving method has been considered to be the most appropriate driving technique for AC PDP. ADS driving method is composed of reset, address, sustain and erase period. Therefore, a long time should be allocated to an address period, which results in a reduction of brightness. To realize a high luminance and high picture quality, it is necessary to high speed addressing. However, address discharge time lag increases as the temperature decreases, which can cause the misfiring and low picture quality In this paper, the electric field effect and priming particle effect are investigated in order to reduce the address discharge time lag at low temperature. Address discharge time lag was reduced effectively when the priming particles are provided.

• 전자공학회논문지
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• 제50권3호
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• pp.174-178
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• 2013

플라즈마 디스플레이 패널에서 기입기간 동안 공통전극에서의 벽전하를 이용하여 기입방전특성을 향상시키기 위하여 수정된 구동 파형을 제시한다. 플라즈마 디스플레이의 구동방식에 있어서 초기화 기간 후에 상판의 두 전극에는 음전하가 쌓이게 되고 하판의 기입전극에는 양전하가 쌓이게 된다. 기입기간 중의 기입방전은 주사펄스와 기입펄스가 동시에 인가될 때 발생되는데 주사전극의 음전하와 기입전극의 양전하가 주로 이용된다. 반면에 공통 전극에서는 기입기간 동안 파형인가 없이 전압만 유지하기 때문에 공통전극의 벽전하는 크게 기여하지 않는다. 본 연구에서는 기입기간 중 주사 및 기입 펄스의 인가시각에 맞춰 공통 전극에서도 펄스를 인가하여 기입방전 특성을 조사하였다. 공통 전극에서의 인가전압의 높이와 펄스의 인가시각에 따른 기입 방전특성을 조사하는 실험을 각각 진행하였으며 그 결과 최적의 전압높이와 인가시각 조건하에서 기입방전의 발생시간을 종래보다 약 200 ns 정도 단축시켰다.