• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.485-486
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• 2016

This paper proposes a new hybrid five-level voltage-source inverter topology, based on the conventional five-level active neutral-point-clamped topology (5L-ANPC), where the lower number of switching devices is required, resulting in saving the cost. The operating principle and control method of the proposed topology is described. The comparison of THD, power losses, loss distribution, and cost of components are evaluated among the proposed topology, the 5L-ANPC and 5L-DCI (diode-clamped inverters) topology.

• The Journal of the Korea institute of electronic communication sciences
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• v.13 no.1
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• pp.61-68
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• 2018

This paper is elaborates on the pure sine wave single phase inverter of 500W level which is driven by battery. The inverter is structured to raise the battery voltage to 400V by using the push-pull topology, and by using H-bridge with the high voltage, it outputs common 220VAC. This topology is utilized to use the power semiconductor device in order to design and manufacture the inverter of 500W at input voltage rating of 12VDC. As a result, the efficiency exceeds 90% in partial sections, but on average, the efficiency is approximately 89.5%, and as for output voltage, frequency fluctuation range and THD, the result can be less than ${\pm}5%$.

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.5
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• pp.438-447
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• 2004

A new multilevel PWM inverter using a half-bridge and full-bridge cells is proposed for the use of stand-alone photovoltaic inverters. The configuration of the proposed multilevel PWM inverter is based on a prior 11-level shaped PWM inverter. Among three full-bridge cells employed in the prior inverter, one cell is substituted by a half-bridge cell. Owing to this simple alteration, the proposed inverter has three promising merits. First it increases the number of output voltage levels resulted in high quality output voltages. Second, it reduces two power switching devices by means of employing a half-bridge cell. Third, it reduces power imposed on a transformer connected with the half-bridge unit. That is to say, most power is transferred to loads via cascaded transformers connected with low switching inverters, which are used to synthesize the fundamental output voltage levels whereas the output of a transformer linked to a high switching inverter is used to improve the final output voltage waves; thus, it is desirable in the point of the improvement of the system efficiency. By comparing to the prior 11-level PWM inverter, it assesses the performance of the proposed inverter as a stand-alone photovoltaic inverter. The validity of the proposed inverter is verified by computer-aided simulations and experimental results.

• Journal of Power Electronics
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• v.14 no.3
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• pp.488-498
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• 2014

This paper presents an implementation of selective harmonic elimination (SHE) modulation for a single-phase 13-level transistor-clamped H-bridge (TCHB) based cascaded multilevel inverter. To determine the optimum switching angle of the SHE equations, the Newton-Raphson method is used in solving the transcendental equation describing the fundamental and harmonic components. The proposed SHE scheme used the relationship between the angles and a sinusoidal reference waveform based on voltage-angle equal criteria. The proposed SHE scheme is evaluated through simulation and experimental results. The digital modulator based-SHE scheme using a field-programmable gate array (FPGA) is described and has been implemented on an Altera DE2 board. The proposed SHE is efficient in eliminating the $3^{rd}$, $5^{th}$, $7^{th}$, $9^{th}$ and $11^{th}$ order harmonics, which validates the analytical results. From the results, it can be seen that the adopted 13-level inverter produces a higher quality with a better harmonic profile and sinusoidal shape of the stepped output waveform.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.5
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• pp.101-109
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• 2009

In this paper, a new method, cascade 3 phase IHCML(Isolated H-bridge Cascade Multi-Level) inverter and a control method is proposed by using two 3-phase transformers that have respectively different transformation rates. Vector control technique in which the highest proximity vector has been used is also put into use. With this process, the switching frequency is almost identical with the output fundamental frequency, which makes less switching loss, and the switching frequency of the small volume of the H-bridge that is in charge of small power is highly controlled, which improves the quality of the output voltage.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.4
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• pp.288-295
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• 2010

Multi-level inverters have drawn much of attention in recent years because it can meet the demand of high power applications and good power quality associated with reduced harmonic distortion. As the number of voltage level increases, field programmable gate arrays (FPGAs) are suitable for the implementation of multi-level modulation algorithm. This paper proposes the implementation method for generating PWM pulses at the three phase diode clamped five-level inverter using FPGA. The strategy for communicating stably the data of three-phase reference voltages between the DSP and FPGA is suggested. The techniques for generating PWM signals based on a multi-carrier modulation method are carried out through the experiments with 32-bit DSP and Cyclone-III FPGA.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.37 no.2
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• pp.80-88
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• 1988

As a method to improve harmonics in the voltage source PWM inverter, 5 level stair case wave method is used. The complementary transistor inverter (CTI) bridge circuit has this characteristics. This circuit required synchronous type 3 level PWM signal. In this paper, the 3 phase PWM digital signals within about 10 modulation error of the natural sampling was caculated, and a ROM table out of it for the digital signal of the control system was made. According to this table, the digital control method was proposed, and DTI circuit operated by this method was reviewed. It was confirmed to make V/F control possible by the select modulation ratio to the frequency.

• Journal of Electrical Engineering and Technology
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• v.5 no.4
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• pp.545-551
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• 2010

A new family of DC to AC converters, referred to as multilevel inverter, has received much attention from industries and researchers for its high power and voltage applications. One of the conventional techniques for implementing the switching algorithm in these inverters is optimized harmonic stepped waveform (OHSW). However, the major problem in using this technique is eliminating low order harmonics by solving the nonlinear and complex equations. In this paper, a new approach called the "bacterial foraging algorithm" (BFA) is employed. This algorithm eliminates and optimizes the harmonics in a multilevel inverter. This method has higher speed, precision, and convergence power compared with the genetic algorithm (GA), a famous evolutionary algorithm. The proposed technique can be expanded in any number of levels. The purpose of optimization is to remove some low order harmonics, as well as to ensure the fundamental harmonic retained at the desired value. As a case study, a 13-level inverter is chosen. The comparison results by MATLAB software between the two optimization methods (BFA and GA) have shown the effectiveness and superiority of BFA over GA where convergence is desired to achieve global optimum.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.1899-1901
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• 1998

A five-level VSI(Voltage Source Inverter) is introduced as a SVC(Static Var Compensator) like a large scale power source. The problems in using SVC are that the power device can easily be destroyed by voltage unbalance and accurate reactive power control is difficult because of voltage variation. A asymmetrical PAM(Pulse Amplitude Modulation) switching pattern is proposed to solve this problem and analyze both fundamental component and harmonic current in the system. Through experimental results of 3.5 kVA experimental test system. It is confirmed that DC capacitor voltage can be controlled by asymmetrical PAM switching pattern control.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.3 no.1
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• pp.223-228
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• 1999

A five-level VSI(Voltage Source Inverter) is introduced as a SVC(Static Vu Compensator) like a large scale power source. The problems in using SVC are that the power device can easily be destroyed by voltage unbalance and accurate reactive power control is difficult because of voltage variation. A asymmetrical PAM(Pulse Amplitude Modulation) switching pattern is proposed to solve this problem and analyze both fundamental component and harmonic current in the system. Through experimental results of 3.5 kVA experimental test system, It is confirmed that DC capacitor voltage can be controlled by asymmetrical PAM switching pattern control.