• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.9 no.5
• /
• pp.1073-1081
• /
• 2005

This paper describes a 3.3 V 10 bit CMOS digital-to-analog converter with a divided architecture of a 7 MSB and a 3 LSB, which uses an optimal Thermal-to-Binary Decoding method. Most of Dfh converters with hiか speed current drive are an architecture choosing current switch cell, column, row decoding method but this decoding circuit is complicated, occupies a large chip area. For these problems, this paper describes a D/A converter using an optimal Thermal-to-Binary Decoding method. The designed D/A converter with an active chip area of $0.953\;mm^2$ is fabricated by using a 0.35um process. The simulation data shows that the rise/fall time, settling time, and INL/DNL are 1.92/2.1 ns, 12.71 ns, and a less than ${\pm}2.3/{\pm}58$ LSB, respectively. The power dissipation of the D/A converter with a single power supply of 3.3 V is about 224 mW.

• Journal of the Korea Society of Computer and Information
• /
• v.16 no.9
• /
• pp.1-10
• /
• 2011

Unfortunately, in current microprocessors, increasing the frequency causes increased power consumption and reduced reliability whereas it improves the performance. To overcome the power and thermal problems in the singlecore processors, multicore processors has been widely used. For 2D multicore processors, interconnection is regarded as one of the major constraints in performance and power efficiency. To reduce the performance degradation and the power consumption in 2D multicore processors, 3D integrated design technique has been studied by many researchers. Compared to 2D multicore processors, 3D multicore processors get the benefits of performance improvement and reduced power consumption by reducing the wire length significantly. However, 3D multicore processors have serious thermal problems due to high power density, resulting in reliability degradation. Detailed thermal analysis for multicore processors can be useful in designing thermal-aware processors. In this paper, we analyze the impact of workload distribution, distance to the heat sink, and number of stacked dies on the processor temperature. We also analyze the effects of the temperature on overall system performance. Especially, this paper presents the guideline for thermal-aware multicore processor design by analyzing the thermal problems in 2D multicore processors and 3D multicore processors.

• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.49 no.8
• /
• pp.617-626
• /
• 2021

During supersonic flight of vehicles, the thermal behavior of structures under high-temperature environment is important for thermal-structural design. In this study, full-field thermal deformation and stress concentration of the notched structure was performed using global-local multi-digital image correlation (multi-DIC) systems. This techniques were developed and implemented by multi-DIC systems consists of 2D DIC system and 3D DIC system. The specimen was heated in a heating chamber to achieve the thermal expansion behavior. Then the images of structure's deformation and stress concentration at various temperature were recorded and analyzed by multi-DIC system. Afterward, full-field thermal deformation of the notched structure was determined with DIC technique and stress concentration at the notched structure was calculated by further processing. Finite element analysis of the notched structure is performed in ABAQUS^TM and the results of the experiments show good agreement with those obtained from simulation. The results achieved in this study show the efficiency of the muilti-DIC method in thermal deformation as well as stress concentration of notched structure.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2009.05a
• /
• pp.160-163
• /
• 2009

최근 적외선 열 영상의 유용함이 발표되어감에 따라 이 기술에 대한 이해와 도입폭이 점진적으로 넓혀져 가고 있다. 국내는 물론 세계적으로 많은 제조, 개발 관련 업체들이 생겨나고 있으며, 업체들의 기술이 발전함에 따라 높은 온도 분해능과 해상도는 물론, 시스템 전체의 크기가 휴대가 가능할 정도로 소형화 되어가고 있는 추세이다. 이러한 열 영상 카메라에서 중요한 역할을 하는 적외선 열 감지 센서에서는 주변 온도, 대상 온도, 표면 온도 등의 측정 오차 및 열상 측정 소자의 온도, Bias 불안정 등의 매우 다양한 원인으로 인한 잡음이 발생하기 쉽다. 이러한 다양한 잡음의 감소는 해상도 및 온도 분해능의 향상과 직결되므로, 잡음을 줄이기 위한 많은 연구가 도처에서 행해지고 있다. 본 논문은 이러한 노력의 일환으로써 각각의 잡음 원인을 규명하지 않고 최종 열 영상 출력물에서 인접 프레임들의 비교, 혼합 하여 제거하는 3D Noise Reduction 기술을 이용해 노이즈를 감쇠하는 방법에 대해 연구하였다.

• The Journal of Korea Robotics Society
• /
• v.13 no.1
• /
• pp.45-54
• /
• 2018

This paper presents a vision-based fall detection system to automatically monitor and detect people's fall accidents, particularly those of elderly people or patients. For video analysis, the system should be able to extract both spatial and temporal features so that the model captures appearance and motion information simultaneously. Our approach is based on 3-dimensional convolutional neural networks, which can learn spatiotemporal features. In addition, we adopts a thermal camera in order to handle several issues regarding usability, day and night surveillance and privacy concerns. We design a pan-tilt camera with two actuators to extend the range of view. Performance is evaluated on our thermal dataset: TCL Fall Detection Dataset. The proposed model achieves 90.2% average clip accuracy which is better than other approaches.

• Proceedings of the IEEK Conference
• /
• 2005.11a
• /
• pp.27-30
• /
• 2005

In this paper, we designed and manufactured the distortion cancellation module which is able to compensate thermal-noise distortion by software The distortion cancellation algorithm not only bring forth system non-linear distortion by input level but also bring compensate component of distortion by thermal to get rid off distortion from now on. After TMS320C6711 DSP to recognize our algorithm, we manufactured the module for every kinds of system To evaluate efficiency of the distortion cancellation module, we designed and manufactured communication system. By measured result, if system output power is -3dBm equally, 12dB of ACLR has improved in 1MHz away from a center frequency, and also gain has increased up to 0.5dB.

• Journal of information and communication convergence engineering
• /
• v.12 no.3
• /
• pp.186-192
• /
• 2014

Monolithic three-dimensional integrated chips (3D ICs) are an emerging technology that offers an integration density that is some orders of magnitude higher than the conventional through-silicon-via (TSV)-based 3D ICs. This is due to a sequential integration process that enables extremely small monolithic inter-tier vias (MIVs). For a monolithic 3D memory, we first explore the static random-access memory (SRAM) design. Next, for digital logic, we explore several design styles. The first is transistor-level, which is a design style unique to monolithic 3D ICs that are enabled by the ultra-high-density of MIVs. We also explore gate-level and block-level design styles, which are available for TSV-based 3D ICs. For each of these design styles, we present techniques to obtain the graphic database system (GDS) layouts, and perform a signoff-quality performance and power analysis. We also discuss various challenges facing monolithic 3D ICs, such as achieving 50% footprint reduction over two-dimensional (2D) ICs, routing congestion, power delivery network design, and thermal issues. Finally, we present design techniques to overcome these challenges.

• The Journal of the Acoustical Society of Korea
• /
• v.12 no.1
• /
• pp.47-54
• /
• 1993

Performance analysis is very important to transmit the high quality information and to construct the optimal system for the minimze the noise from the channel of spread spectrum system. In this paper the error rate performance is analyzed with computer simulation in noncoherent frequency hopping M-qry frequency shift keying(FH/MFSk) systems with regard to thermal noise under the partial band jamming environments. AS a result, in case the thermal noise is disregarded, bit error probability of system in jamming fraction ρ and Eb/Nj(bit energy to jamming power density) is reduced with the increase of K and in worst case 32FSK system is better than 2FSK system by 3.23dB with the variatio of Eb/Nj. In case thermal noise is considered, bit error probability of system by 3.23dB with the variation of Eb/Nj. In case thermal noise is considered, bit error probability of system are reduced with the increase of K and Eb/No(bit energy to thermal noise density). Bit error probability in connection with worst case ρ is not largely influenced form over the 14dB to K=1 and 8dB to K=5 accordingly thermal noise disregarding. These results may be useful for avoiding the common vulnerabilities when the spread spectrum system is designed.

• The Journal of Information Technology
• /
• v.10 no.3
• /
• pp.47-58
• /
• 2007

In this paper, we designed and manufactured the distortion-cancellation module which is able to compensate thermal-noise distortion by software. The distortion-cancellation algorithm not only bring forth system non-linear distortion by input level but also bring compensate component of distortion by thermal to get rid off distortion from now on. After TMS 320C6711 DSP to recognize our algorithm, we manufactured the module for every kinds of system. To evaluate efficiency of the distortion-cancellation module, we designed and manufactured communication system. By measured result, if system output power is -3dBm equally, 12dB of ACLR has improved in 1MHz away from a center frequency, and also gain has increased up to 0.5dB.

• The KIPS Transactions:PartA
• /
• v.19A no.2
• /
• pp.77-84
• /
• 2012

Speculative execution for improving instruction-level parallelism is widely used in high-performance processors. In the speculative execution technique, the most important factor is the accuracy of branch predictor. Unfortunately, complex branch predictors for improving the accuracy can cause serious thermal problems in 3D multicore processors. Thermal problems have negative impact on the processor performance. This paper analyzes two methods to solve the thermal problems in the branch predictor of 3D multi-core processors. First method is dynamic thermal management which turns off the execution of the branch predictor when the temperature of the branch predictor exceeds the threshold. Second method is thermal-aware branch predictor placement policy by considering each layer's temperature in 3D multi-core processors. According to our evaluation, the branch predictor placement policy shows that average temperature is $87.69^{\circ}C$, and average maximum temperature gradient is $11.17^{\circ}C$. And, dynamic thermal management shows that average temperature is $89.64^{\circ}C$ and average maximum temperature gradient is $17.62^{\circ}C$. Proposed branch predictor placement policy has superior thermal efficiency than the dynamic thermal management. In the perspective of performance, the proposed branch predictor placement policy degrades the performance by 3.61%, while the dynamic thermal management degrades the performance by 27.66%.