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A Design of 10 bit Current Output Type Digital-to-Analog Converter  

Gyoun Gi-Hyub (금오공과대학교 전자공학과)
Kim Tae-Min (구미1대학 정보통신과)
Shin Gun-Soon (금오공과대학교 전자공학부)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.9, no.5, 2005 , pp. 1073-1081 More about this Journal
Abstract
This paper describes a 3.3 V 10 bit CMOS digital-to-analog converter with a divided architecture of a 7 MSB and a 3 LSB, which uses an optimal Thermal-to-Binary Decoding method. Most of Dfh converters with hiか speed current drive are an architecture choosing current switch cell, column, row decoding method but this decoding circuit is complicated, occupies a large chip area. For these problems, this paper describes a D/A converter using an optimal Thermal-to-Binary Decoding method. The designed D/A converter with an active chip area of $0.953\;mm^2$ is fabricated by using a 0.35um process. The simulation data shows that the rise/fall time, settling time, and INL/DNL are 1.92/2.1 ns, 12.71 ns, and a less than ${\pm}2.3/{\pm}58$ LSB, respectively. The power dissipation of the D/A converter with a single power supply of 3.3 V is about 224 mW.
Keywords
DAC; Thermal-to-Binary Decoding; INL/DNL;
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