• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.11
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• pp.1164-1171
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• 2014

Bulk Current Injection(BCI) test is a method of injecting current into Integrated Circuit(IC) using a current injection probe to qualify the standards of Electromagnetic Compatibility(EMC). This paper, we propose a microstrip coupler structure that can replace the BCI current injection probe that is used to inject a RF noise in standard IEC 62132-part 3 documented by International Electrotechnical Commission. Conventional high cost BCI probe has mostly been used in testing automotive ICs that use high supply voltage. We propose a compact microstrip coupler which is suitable for immunity testing of low power ICs. We tested its validity to replace the BCI injection probe from 100 MHz to 1,000 MHz. We compared the power[dBm] that is needed to generate the same level of noise between current injection probe and microstrip coupler by sweeping the frequency. Results show that microstrip coupler can inject the same level of noise into ICs for immunity test with less power.

• Journal of the Optical Society of Korea
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• v.20 no.6
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• pp.784-793
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• 2016

We present a single shot low coherence white light Hilbert phase microscopy (WL-HPM) for quantitative phase imaging of Si optoelectronic devices, i.e., Si integrated circuits (Si-ICs) and Si solar cells. White light interferograms were recorded by a color CCD camera and the interferogram is decomposed into the three colors red, green and blue. Spatial carrier frequency of the WL interferogram was increased sufficiently by means of introducing a tilt in the interferometer. Hilbert transform fringe analysis was used to reconstruct the phase map for red, green and blue colors from the single interferogram. 3D step height map of Si-ICs and Si solar cells was reconstructed at multiple wavelengths from a single interferogram. Experimental results were compared with Atomic Force Microscopy and they were found to be close to each other. The present technique is non-contact, full-field and fast for the determination of surface roughness variation and morphological features of the objects at multiple wavelengths.

• ETRI Journal
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• v.36 no.4
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• pp.643-653
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• 2014

To reduce interconnect delay and power consumption while improving chip performance, a three-dimensional integrated circuit (3D IC) has been developed with die-stacking and through-silicon via (TSV) techniques. The power supply problem is one of the essential challenges in 3D IC design because IR-drop caused by insufficient supply voltage in a 3D chip reduces the chip performance. In particular, power bumps and TSVs are placed to minimize IR-drop in a 3D power delivery network. In this paper, we propose a design methodology for 3D power delivery networks to minimize the number of power bumps and TSVs with optimum mesh structure and distribute voltage variation more uniformly by shifting the locations of power bumps and TSVs while satisfying IR-drop constraint. Simulation results show that our method can reduce the voltage variation by 29.7% on average while reducing the number of power bumps and TSVs by 76.2% and 15.4%, respectively.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.10 no.3
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• pp.19-25
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• 2001

In this paper, we developed a Windows 98 version Off-Line Programming System which can simulate a Robot model in 3D Graphics space. 4 axes SCARA Robot (especially FARA SM5) was adopted as an objective model. Forward kinemat-ics, inverse kinematics and robot dynamics modeling were included in the developed program. The interface between users and the OLP system in the Windows 98s GUI environment was also studied. The developing is Microsoft Visual C++. Graphic libraries, OpernGL, by silicon Graphics, Inc. were utilized for 3D Graphics.

• ETRI Journal
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• v.41 no.2
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• pp.262-269
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• 2019

This paper introduces a low-cost, high-performance mmWave antenna array module at 77 GHz. Conventional waveguide transitions have been replaced by 3D CPW-microstrip transitions which are much simpler to realize. They are compatible with low-cost substrate fabrication processes, allowing easy integration of ICs in 3D multi-chip modules. An antenna array is designed and implemented using multilayer coupled-fed patch antenna technology. The proposed $16{\times}16$ array antenna has a fractional bandwidth of 8.4% (6.5 GHz) and a 23.6-dBi realized gain at 77 GHz.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.131-136
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• 2013

TSV based 3D ICs have been widely developed with new problems at die and IC levels. It is imperative to test at post-bond as well as pre-bond to achieve high reliability and yield. This paper introduces a new testable design technique which not only test microscopic defects at TSV input/output contact at a die but also test interconnect defects at a stacked IC. IEEE 1500 wrapper cells are augmented and through at-speed tests for pre-bond die and post-bond IC, known-good-die and defect free 3D IC can be massively manufactured+.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.3
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• pp.1-6
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• 2013

3D integrated circuit(IC) technology with TSV(through Si via) liquid cooling system is discussed. As a device scales down, both interconnect and packaging technologies are not fast enough to follow transistor's technology. 3D IC technology is considered as one of key technologies to resolve a device scaling issue between transistor and packaging. However, despite of many advantages, 3D IC technology suffers from power delivery, thermal management, manufacturing yield, and device test. Especially for high density and high performance devices, power density increases significantly and it results in a major thermal problem in stacked ICs. In this paper, the recent studies of TSV liquid cooling system has been reviewed as one of device cooling methods for the next generation thermal management.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.3
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• pp.154-161
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• 2006

This paper describes the new types of ngative differential resistance (NDR) IC applications which use a monolithic quantum-effect device technology based on the RTD/HBT heterostructure design. As a digital IC, a low-power/high-speed MOBILE (MOnostable-BIstable transition Logic Element)-based D-flip flop IC operating in a non-return-to-zero (NRZ) mode is proposed and developed. The fabricated NRZ MOBILE D-flip flop shows high speed operation up to 34 Gb/s which is the highest speed to our knowledge as a MOBILE NRZ D-flip flop, implemented by the RTD/HBT technology. As an analog IC, a 14.75 GHz RTD/HBT differential-mode voltage-controlled oscillator (VCO) with extremely low power consumption and good phase noise characteristics is designed and fabricated. The VCO shows the low dc power consumption of 0.62 mW and good F.O.M of -185 dBc/Hz. Moreover, a high-speed CML-type multi-functional logic, which operates different logic function such as inverter, NAND, NOR, AND and OR in a circuit, is proposed and designed. The operation of the proposed CML-type multi-functional logic gate is simulated up to 30 Gb/s. These results indicate the potential of the RTD based ICs for high speed digital/analog applications.

• Korean Journal of Clinical Pharmacy
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• v.26 no.4
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• pp.298-305
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• 2016

Background: This study is to investigate the prescription patterns and factors related to the number of medications treating chronic obstructive pulmonary disease (COPD) in patients under 65 years old according to GOLD guidelines. Methods: We retrospectively analyzed the medical records of patients aged 40-64 years with a diagnosis of COPD from January to March 2016. Patients were classified by combined assessment of COPD (grades A, B, C, D) using spirometry, exacerbation history, mMRC, and/or CAT results. We analyzed prescribed medications, treatment options and factors related to the numbers of COPD medications. Results: The total number of prescriptions were 251. About 35.5% of patients were classified as GOLD A, 34.2% as GOLD B, 17.1% as GOLD C and 13.2% as GOLD D. Inhaled bronchodilator was prescribed for 86.9% of patients and the most frequent COPD medication was long-acting muscarinic antagonist (LAMA) followed by inhaled corticosteroids/long acting beta agonist (ICS/LABA). The majority of low risk patients (GOLD A/B) were prescribed a monotherapy with LAMA or LABA. For high risk patients (GOLD C/D), combination treatment with ICS+LAMA+LABA was mostly prescribed. The 21.2% of patients in GOLD D received systemic corticosteroid. The average number of medications per prescription was 3.7, and this number increased with increasing COPD grade, COPD duration and lung function reduction ($FEV_1$, $FEV_1/FVC$). Conclusion: Generally high adherence to GOLD guideline recommendations was reported. Given the progressive nature of the disease, results suggest that closer attention to respiratory symptoms for early detection, diagnosis, and appropriate treatment of COPD is warranted.

• Journal of the Microelectronics and Packaging Society
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• v.22 no.2
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• pp.5-9
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• 2015

Thermal management becomes serious in 3D stacked IC because of higher heat flux, increased power generation, extreme hot spot, etc. In this paper, we reviewed the recent developments of thermal management for 3D stacked IC which is a promising candidate to keep Moore's law continue. According to experimental and numerical simulation results, Cu TSV affected heat dissipation in a thin chip due to its high thermal conductivity and could be used as an efficient heat dissipation path. Other parameters like bumps, gap filling material also had effects on heat transfer between stacked ICs. Thermal aware circuit design was briefly discussed as well.