• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.4
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• pp.300-308
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• 2010

This paper describes the development of a low-power electrocardiogram (ECG) touch sensor intended for the use with two dry metal electrodes. An equivalent ECG extraction circuit model encountered in a ground-free two-electrode configuration is investigated for an optimal sensor read-out circuit design criteria. From the equivalent circuit model, (1) maximum sensor resolution is derived based on the electrode's background thermal noise, which originates from high electrode-skin contact impedance, together with the input referred noise of instrumentation amplifier (IA), (2) 60 Hz electrostatic coupling from mains and motion artifact are also considered to determine minimum requirement of common mode rejection ratio (CMRR) and input impedance of IA. A dedicated ECG read-out front end incorporating chopping scheme is introduced to provide an input referred circuit noise of 1.3 ${\mu}V_{rms}$ over 0.5 Hz ~ 200 Hz, CMRR of IA > 100 dB, sensor resolution of 7 bits, and dissipating only 36 ${\mu}W$. Together with 8 bits synchronous successive approximation register (SAR) ADC, the sensor IC chip is implemented in 0.18 ${\mu}m$ CMOS technology and integrated on a 5 cm $\times$ 8 cm PCB with two copper patterned electrodes. With the help of proposed touch sensor, ECG signal containing QRS complex and P, T waves are successfully extracted by simply touching the electrodes with two thumbs.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.3
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• pp.189-195
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• 2004

A 10 Gb/s limiting amplifier IC with the emitter area of $1.5{\times}10{\mu}m^2$ for optical transmission system was designed and fabricated with a AIGaAs/GaAs HBTs technology. In this stud)', we evaluated fine pitch bump using WL-CSP (Wafer Level-Chip Scale Packaging) instead of conventional wire bonding for interconnection. For this we developed WL-CSP process and formed fine pitch solder bump with the $40{\mu}m$ diameter and $100{\mu}m$ pitch on bonding pad. To study the effect of WL-CSP, electrical performance was measured and analyzed in wafer and package module using WL-CSP. In a package module, clear and wide eye diagram openings were observed and the riselfall times were about 100ps, and the output" oltage swing was limited to $600mV_{p-p}$ with input voltage ranging from 50 to 500m V. The Small signal gains in wafer and package module were 15.56dB and 14.99dB respectively. It was found that the difference of small signal gain in wafer and package module was less then 0.57dB up to 10GHz and the characteristics of return loss was improved by 5dB in package module. This is due to the short interconnection length by WL-CSP. So, WL-CSP process can be used for millimeter wave GaAs MMIC with the fine pitch pad.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.9
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• pp.9-18
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• 1998

A single RF transceiver chip for an extended GSM handset application was designedm, fabricated and evaluated. A RFIC was fabricated by using silicon BiCMOS process, and then packaged in 80 pin TQFP of $10 {\times} 10 mm^{2}$ in size. As a result, it was achieved guite reasonable integraty and good RF performance at the operation voltage of 3.3V. This paper describes development results of RF receiver section of the RFIC, which includes LNA, down conversion mixer, AGC, switched capacitor filter and down sampling mixer. The test results show that RF receiver section is well operated within frequency range of 925 ~960 MHz, which is defined on the extended GSM specification (E-GSM). The receiver section also reveals moderate power consumption of 67 mA and minimum detectable signal of -105 dBm.

• Journal of IKEEE
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• v.2 no.2 s.3
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• pp.278-284
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• 1998

This paper describes a l0b CMOS A/D converter (ADC) for HDTV applications. The proposed ADC adopts a typical multi-step pipelined architecture. The proposed circuit design techniques are as fo1lows: A selective channel-length adjustment technique for a bias circuit minimizes the mismatch of the bias current due to the short channel effect by supply voltage variations. A power reduction technique for a high-speed two-stage operational amplifier decreases the power consumption of amplifiers with wide bandwidths by turning on and off bias currents in the suggested sequence. A typical capacitor scaling technique optimizes the chip area and power dissipation of the ADC. The proposed ADC is designed and fabricated in s 0.8 um double-poly double-metal n-well CMOS technology. The measured differential and integral nonlinearities of the prototype ADC show less than ${\pm}0.6LSB\;and\;{\pm}2.0LSB$, respectively. The typical ADC power consumption is 119 mW at 3 V with a 40 MHz sampling rate, and 320 mW at 5 V with a 50 MHz sampling rate.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.42 no.5 s.305
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• pp.43-50
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• 2005

This paper describes some IC(integrated circuits) design and implementation techniques of low power multi-band Gm-C bandpass filter for body composition analyzer. Proposed BPF(bandpass filter) can be selected from three bands(20 KHz, 50 KHz, 100 KHz) by control signal. To minimize die area, a simple center frequency tuning scheme is used. And to reduce power consumption, operational transconductance amplifier operated in the sub-threshold region is adopted. The proposed BPF is implemented with 0.35 um 2-poly 3-metal standard CMOS technology Chip area is $626.42um\;{\times}\;475.8um$ and power consumption is 700 nW@100 KHz.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.6
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• pp.60-67
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• 2008

A low-power 2.4GHz fractional-N frequency synthesizer has been designed for 2.4GHz ISM band applications such as Bluetooth, Zigbee, and WLAN. To achieve low-power characteristic, the design has been focused on the power optimization of power-hungry blocks such as VCO, prescaler, and ${\Sigma}-{\Delta}$ modulator. An NP-core type VCO is adopted to optimize both phase noise and power consumption. Dynamic D-F/Fs with no static DC current are employed in designing the low-power prescaler circuit. The ${\Sigma}-{\Delta}$ modulator is designed using a modulus mapping circuit for reducing hardware complexity and power consumption. The designed frequency synthesizer which was fabricated using a $0.18{\mu}m$ CMOS process consumes 7.9mA from a single 1.8V supply voltage. The experimental results show that a phase noise of -118dBc/Hz at 1MHz offset, the reference spur of -70dBc at 25MHz offset, and the channel switching time of $15{\mu}s$ over 25MHz transition have been achieved. The designed chip occupies an area of $1.16mm^2$ including pads where the core area is only $0.64mm^2$.

• Proceedings of the Korean Society of Applied Pharmacology
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• 2003.11a
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• pp.98-98
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• 2003

${\beta}$-(1,3)-D-Glucans have been known to exhibit antitumor and antimicrobial activities. The presence of dectin-1,${\alpha}$, ${\beta}$-glucan receptor of dendritic cell, on macrophage has been controvertial. RT-PCR analysis led to the detection of dectin-1${\alpha}$ and ${\beta}$ in murine macrophage Raw264.7 cell line. Among the various organs of mouse, dectin-1${\alpha}$ and ${\beta}$ were detected in the thymus, lung, spleen, stomach and intestine. To analyze gene expression modulated by ${\beta}$-glucan treated murine Raw264.7 macrophage, total mRNA was applied to cDNA microarray to interrogate the expression of 7,000 known genes. cDNA chip analysis showed that ${\beta}$-glucan of P. osteatus increased gene expressions of immunomodulating genes, membrane antigenic proteins, chemokine ligands, complements, cytokines, various kinases, lectin associated genes and oncogenes in Raw 264.7 cell line. When treated with ${\beta}$-glucan of P. osteatus and LPS, induction of gene expression of TNF-${\alpha}$ and IFN-R1 was confirmed by RT-PCR analysis. Induction of TNF-R type II expression was confirmed by FACS analysis. IL-6 expression was abolished by EDTA in ${\beta}$-glucan and LPS treated Raw264.7 cell line, indicating that ${\beta}$-glucan binds to dectin-l in a Ca$\^$＋＋/ -dependent manner. To increase antitumor efficacy of ${\beta}$-glucan, ginsenoside Rh2 (GRh2) was co-treated with ${\beta}$-glucan in vivo and in vitro tests. IC$\sub$50/ values of GRh2 were 20 and 25 $\mu\textrm{g}$/$m\ell$ in SNU-1 and B16 melanoma F10 cell line, respectively. Co-treatment with ${\beta}$-glucan and GRh2 showed synergistic antitumor activity with cisplatin and mitomycin C both in vitro and in vivo. Single or co-treatment with ${\beta}$-glucan and GRh2 increased tumor bearing mouse life span. Co-treatment with ${\beta}$-glucan and GRh2 showed more increased life span with mitomycin C than that with cisplatin. Antitumor activities were 67% and 72 % by co-injection with ${\beta}$-glucan and GRh2 in the absence or presence of mitomycin C, respectively.