• Journal of Biomedical Engineering Research
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• v.32 no.1
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• pp.45-54
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• 2011

Cuff electrodes have a benefit for chronic electroneurogram(ENG) recording while minimizing nerve damage. However, the ENG signals are usually contaminated by electromyogram(EMG) activity from the surrounding muscle, the thermal noise generated within the source resistance, and the electric noise generated primarily at the first stage of the amplifier. This paper proposes a new cuff electrode to reduce the interference of EMG signals. An additional middle electrode was placed at the center of cuff electrode. As a result, the proposed cuff electrode achieved a higher signal-to-interference ratio compared to the conventional tripolar cuff. The cuff electrode was then assembled together with closure, headstage, and hermetic case including electronic circuits. This paper also presents a lownoise amplifier system to improve signal-to-noise ratio. The circuit was designed based on the noise analysis to minimize the electronic noise. The result shows that the total noise of the amplifier was below $1{\mu}V_{rms}$ for a cuff impedance of $1\;k{\Omega}$ and the common-mode rejection ratio was 115 dB at 1 kHz. In the current study, the performance of nerve cuff electrode system was evaluated by monitoring afferent nerve signals under mechanical stimuli in a rat animal model.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.3 s.357
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• pp.111-116
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• 2007

We have developed a passive millimeter wave (PMMW) imaging system with two-dimensional imaging arrays. For the imaging system we achieved single-substrate imaging-array element which include all necessary component such as Fermi tapered slot antenna (TSA), a balun, LNA's and a detector circuit on it. Two-dimensional arrays for real-time imaging at the 35 GHz band are currently under development. We will be able to make an advanced PMMW image system based on our system with the $2\times2$ imaging array in the near future.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.4
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• pp.28-39
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• 2007

This paper presents a programmable RF DFT (Radio Frequency Design-for-Testability) circuit for low noise amplifiers. We have developed a new on-chip RF DFT circuit that measures RF parameters of low noise amplifier (LNA) using only DC measurements [1, 2]. This circuit is extremely useful for today's RFIC devices in a complete RF transceiver environment. The DFT circuit contains test amplifier with programmable capacitor banks and RF peak detectors. The test circuit utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance and gain using the mathematical equations. Our on-chip DFT circuit can be self programmed for 1.8GHz, 2.4GHz and 5.25GHz low noise amplifiers for GSM, Bluetooth and IEEE802.11g standards. The circuit is simple and inexpensive.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.15 no.2
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• pp.175-180
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• 2015

In this paper, GPS / GLONASS receiving a small active antenna is proposed. A microstrip patch antenna which supports dual-band (GPS and GLONASS) was optimized. The antenna size is $13{\times}13{\times}3.6mm$. The jig was changed to confirm the proposed antenna characteristic size, was adjusted to feed gap of the patch antenna, it was confirmed by change in LNA shield case or not. The antenna jig size is $65.6{\times}13{\times}0.8mm$. The maximum gain of the GPS band is 3.78dBi, the maximum gain of the GLONASS bands is 4dBi. To amplify the Satellite reception signal level, one-stage low noise amplifier(LNA) was designed. The LNA chip was using the BGA715 N7, the LNA gain is 19.9dB. The utilization possibility of the GPS / GLONASS receiving a small active antenna could be confirmed according to compare and analyze the simulation and measurement data.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.14 no.1
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• pp.119-124
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• 2014

In this paper, A GSm/WCDMA band antenna which can be confirmed positioning information of a container by using the GPS/GLONASS bands on one board and can be sent the positioning information to the mobile communication network in real time is designed. A microstrip patch antennas which supports dual-band (GPS and GLONASS) was optimized. The antenna size is $25{\times}25{\times}5[mm]$. A chip monopole antennas which supports dual-band (GSM and WCDMA) was optimized. The antenna size is $27{\times}8{\times}3.2[mm]$. To amplify the Satellite reception signal level, two-stage low noise amplifier(LNA) was designed. The LNA gain is 27[dB]. The size of Jig for antennas measuring is $100{\times}30{\times}1[mm]$.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.8
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• pp.159-165
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• 2015

In this paper, we designed and tested of the passive millimeter-wave imaging system in near range. The proposed passive millimeter-wave imaging system consists two parts. The first part is a 94 GHz band millimeter imaging sensor which is coupled to an antenna, two LNAs, and a diode detector. The second part is a control unit. The control unit is consists of the 2-axes Cartesian robot, the data acquisition (DAQ), and imaging program. The 2-axes Cartesian robot should be able to scan a 2-D image of the metalic tools, IC card and plastic objects, with a raster scanning method. The passive millimeter-wave image of $20{\times}20$ pixels is acquired within less than 60s, and is immediately displayed and stored for post processing.In order to improve the image quality, interpolation methods are applied.

• Journal of IKEEE
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• v.22 no.3
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• pp.786-792
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• 2018

A third-order sigma-delta modulator with the architecture of cascade of integrator feedback (CIFB) is proposed for an analog-digital converter used in low-power sensor interfaces. It consists of three switched-capacitor integrators using a gain-enhanced current-mirror-based amplifier, a single-bit comparator, and a non-overlapped clock generator. The proposed sigma-delta analog modulator with over-sampling ratio of 160 and maximum SNR of 90.45 dB is implemented using $0.11-{\mu}m$ CMOS process with 1.2-V supply voltage. The area and power consumption of the sigma-delta analog modulator are $0.145mm^2$ and $341{\mu}W$, respectively.

• Journal of IKEEE
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• v.2 no.2 s.3
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• pp.278-284
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• 1998

This paper describes a l0b CMOS A/D converter (ADC) for HDTV applications. The proposed ADC adopts a typical multi-step pipelined architecture. The proposed circuit design techniques are as fo1lows: A selective channel-length adjustment technique for a bias circuit minimizes the mismatch of the bias current due to the short channel effect by supply voltage variations. A power reduction technique for a high-speed two-stage operational amplifier decreases the power consumption of amplifiers with wide bandwidths by turning on and off bias currents in the suggested sequence. A typical capacitor scaling technique optimizes the chip area and power dissipation of the ADC. The proposed ADC is designed and fabricated in s 0.8 um double-poly double-metal n-well CMOS technology. The measured differential and integral nonlinearities of the prototype ADC show less than ${\pm}0.6LSB\;and\;{\pm}2.0LSB$, respectively. The typical ADC power consumption is 119 mW at 3 V with a 40 MHz sampling rate, and 320 mW at 5 V with a 50 MHz sampling rate.

• 전자공학회논문지 IE
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• v.45 no.1
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• pp.31-37
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• 2008

A Wibro RF down converter of 2.3GHz band is designed and implemented in this paper. The problems that can occur in the receiver LNA(Low Noise Amplifier) to minimize additional purposes. In addition, 2.3GHz band from the 75 MHz downward to minimize the losses in the process, transform and improve efficiency, and achieve stable characteristics can be used to make high frequency characteristics of the device. Wibro repeater uses a TDMA(Time Division Multiplexing Access) method is needed because the RF switch. Production criterion specification, the input voltage from +8 V 1.2A of current consumption, 60dB gain and the noise figure of less than 2.5dB, VSWR(Voltage Standing Wave Ratio) less than 1.5, more than IMD(Inter Modulation Distortion) 60dB satisfied. Environmental conditions ($-20^{\circ}C$ to $70^{\circ}C$) to pass the test of reliability in a long time, that seemed crafted Wibro down converter be applied to the Wibro repeater.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.3
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• pp.20-40
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• 2003

Since unloaded Q-value of a high-temperature superconductor(HTS) filter is very high, a bandpass filter(BPF) and a lowpass filter(LPF) with an increase of pole numbers can be fabricated without an increase of an insertion loss(IL) ; recently a 70-pole BPF is developed in USA. They have an abrupt skirt property and an excellent attenuation level for out-of band. Moreover, they can be miniaturized when lumped element resonators or the slow-wave characteristic are used. Technology of fabricating a HTS epitaxial film as well as a film of a 4 inch area also makes the planar type filter with a various structure and an enhanced power handling capability possible. Recently, the HTS filter subsystems composed of a planar-type HTS filters, a GaAs-based LNA and a mini-cryocooler are developed. The extended receiver front- end subsystems for mobile radio communications decrease the noise-figure level of the communication system and the frequency interference interacted adjacent bands, and increase the efficiency of frequency and the capacity of communication system. In this paper, theory for developing the HTS filter, its kinds, its design rules, its characteristics are reviewed. The feature of the research and market trends related to the HTS filter systems for the receiver front-end subsystem of mobile base station are surveyed.