Journal of IKEEE (전기전자학회논문지)

Institute of Korean Electrical and Electronics Engineers (한국전기전자학회)
권호 표지
DOI QR코드

DOI QR Code

A 1.2V 90dB CIFB Sigma-Delta Analog Modulator for Low-power Sensor Interface

저전력 센서 인터페이스를 위한 1.2V 90dB CIFB 시그마-델타 아날로그 모듈레이터

  • Park, Jin-Woo (Department of Electronics Engineering, Kumoh National Institute of Technology) ;
  • Jang, Young-Chan (Department of Electronics Engineering, Kumoh National Institute of Technology)
  • Received : 2018.09.07
  • Accepted : 2018.09.18
  • Published : 2018.09.30
Download PDF
⟨ Previous Next ⟩

Abstract

A third-order sigma-delta modulator with the architecture of cascade of integrator feedback (CIFB) is proposed for an analog-digital converter used in low-power sensor interfaces. It consists of three switched-capacitor integrators using a gain-enhanced current-mirror-based amplifier, a single-bit comparator, and a non-overlapped clock generator. The proposed sigma-delta analog modulator with over-sampling ratio of 160 and maximum SNR of 90.45 dB is implemented using $0.11-{\mu}m$ CMOS process with 1.2-V supply voltage. The area and power consumption of the sigma-delta analog modulator are $0.145mm^2$ and $341{\mu}W$, respectively.

본 논문에서는 저전력 센서용 아날로그-디지털 변환기를 위한 cascade of integrator feedback (CIFB) 구조의 3차 시그마-델타 아날로그 모듈레이터가 제안된다. 제안된 시그마-델타 아날로그 모듈레이터는 gain-enhanced current-mirror 기반 증폭기를 사용하는 3개의 스위치 커패시터 적분기, 단일 비트 비교기, 그리고 비중첩 클럭 발생기로 구성된다. 160의 오버 샘플링 비율과 90.45dB의 신호 대 잡음비를 가지는 시그마-델타 아날로그 모듈레이터는 1.2V 공급 전압의 $0.11{\mu}m$ CMOS 공정으로 설계되며, $0.145mm^2$의 면적과 $341{\mu}W$의 전력을 소모한다.

Keywords

References

  1. A. Nikas, O. Leman, H. Zhou, J. L. Lagos, B. J. Vinchhi, and J. Hauer, "A 83dB SNDR low power readout ASIC for piezoresistive nanogauge based gyroscopes," IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2238-2241, 2016. DOI:10.1109/ISCAS.2016.7539028
  2. H. Xu, X. Liu and L. Yin, "A Closed-Loop $\Delta$ $\Sigma$ Interface for a High-Q Micromechanical Capacitive Accelerometer With 200 ng/$\surd$Hz Input Noise Density," IEEE J. Solid-State Circuits, vol.50, no.9, pp. 2101-2112, 2015. DOI:10.1109/JSSC.2015.2428278
  3. Z. Tan, R. Daamen, A. Humbert, Y. V. Ponomarev, Y. Chae, and M. A. P. Pertijs, "A 1.2-V 8.3-nJ CMOS Humidity Sensor for RFID Applications," IEEE J. Solid-State Circuits, vol.48, no.10, pp. 2469-2477, 2013. DOI:10.1109/JSSC.2013.2275661
  4. M. Honarparvar, M. Safi-Harb, and M. Sawan, "An Amplifier-Shared Inverter-Based MASH Structure $\Delta$$\Sigma$ Modulator For Smart Sensor Interfaces," IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2250-2253, 2016. DOI:10.1109/ISCAS.2016.7539031
  5. J. M. de la Rosa and R. del Rio, CMOS Sigma-Delta Converters: Practical Design Guide, John Wiley & Sons, Ltd., 2013.
  6. J. Roh, S. Byun, Y. Choi, H. Roh, Y.-G. Kim and J.-K. Kwon, "A 0.9-V 60-${\mu}$W 1-Bit Fourth-Order Delta-Sigma Modulator With 83-dB Dynamic Range," IEEE J. Solid-State Circuits, vol.43, no.2, pp. 361-370, 2008. DOI:10.1109/JSSC.2007.914266
  7. R. Schereier, J. Silva, J. Steensgaard and Gabor C. Temes, "Design-Oriented Estimation of Thermal Noise in Switched-Capacitor Circuits," IEEE Trans. Circuits and Systems I, Regular Papers, vol.52, no.11, pp. 2358-2368, 2005. DOI:10.1109/TCSI.2005.853909
  8. R. J. Baker, CMOS: Mixed-Signal Circuit Design, Wiley, 2002.
  9. L. Yao, M. S. J. Steyaert, and W. Sansen, "A 1-V 140-${\mu}$W 88-dB Audio Sigma-Delta Modulator in 90-nm CMOS," IEEE J. Solid-State Circuits, vol.39, no.11, pp. 1809-1818, 2004. DOI:10.1109/JSSC.2004.835825
  10. B. Nikolic, V. G. Oklobdzija, V. Stojanovic, W. Jia, J. K.-S. Chiu, and M. M.-T. Leung "Improved sense-amplifier-based flip-flop: design and measurements," IEEE J. Solid-State Circuits, vol.35, no.6, pp. 876-884, 2000. DOI:10.1109/4.845191