• Title/Summary/Keyword: 이가 논리

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Synchronization of Timers in Embedded Systems (임베디드 시스템 타이머 동기화)

  • Lee, Hyung-Bong
    • Proceedings of the Korea Information Processing Society Conference
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    • 2013.05a
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    • pp.13-14
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    • 2013
  • 임베디드 시스템 구성 요소 중 가장 빈번하게 사용되는 디바이스들 중의 하나로 타이머를 들 수 있다. 대부분의 임베디드 시스템 MCU 들은 3~5 개의 타이머를 제공하므로 설정시간 별로 독립된 타이머를 할당하여 구현할 수 있다. 그러나 TDMA 기반 무선 통신 프로토콜 등과 같이 10 개 이상의 타이머를 필요로 하는 경우가 있는데, 이런 경우에는 하나의 물리적 타이머에 여러 개의 논리적 타이머를 구현해야 한다. 이 때, 논리적 타이머들 사이에 물리적 타이머의 분해능에 따른 오차가 존재하여 시간 동기화 오차를 유발하는 원인이 된다. 이 논문에서는 이러한 논리적 타이머 사이에 존재하는 오차를 자세하게 분석하여 제기하고, 이를 극복하는 방안을 모색한다.

A study on the design of linear MVL systems based on the tree structure (트리구조에 기초한 선형다치논리시스템의 설계에 관한 연구)

  • 나기수;신부식;박승용;최재석;김홍수
    • Proceedings of the IEEK Conference
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    • 1998.06a
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    • pp.550-553
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    • 1998
  • 본 논문에서는 노드들간의 입출력 관계가 트리형태로 주어진 경우에 이 관계를 수식으로 해석하여 최소화시키고 이를 회로로 구현하는 새로운 알고리즘을 제안한다. nakagima 등에 의해 제안된 알고리듬은 트리의 특성을 갖는 노드들의 관계를 2치논리에 근거하여 회로로 구현하였으나, 이러한 기법은 일반적인 형태로 주어진 트리구조에 대한 해석이 충분치 못하므로, 일반화된 회로의 구성에 많은 제약을 가지고 있다. 이러한 문제점에 대하여 본 논문에서는 트리구조를 갖는 노즈들의 전체적인 입출력관계를 수식으로 정리하여 최소화된 회로설계 알고리즘을 제안하고 예를 들어 이를 검증한다.

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현재성 문제와 지금의 지표성

  • Kang, Su-Hwi
    • Korean Journal of Logic
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    • v.9 no.1
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    • pp.173-204
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    • 2006
  • 최근의 시간에 관한 철학적 논의에서 새로운 무시제 이론가들은 시제 문장들의 진리조건을 무시제 문장들을 통해 부여할 수 있다는 언어철학적 결과를 통해, 시제 사실들과 같은 것들을 받아들일 필요가 없다고 주장함으로써 A-이론을 비판해 왔다. 이 논문에서는 형이상학적 논변을 새롭게 제시함으로써, 언어 철학적인 논변과 달리 B-이론은 유지될 수 없으며, 오히려 A-이론이 시간에 대한 올바른 이론임을 논증하게 된다. 그리고 이러한 논의가 이루어지는 가운데 존속과 변화에 관한 흥미로운 문제들이 다루어지며, 시간 철학에서의 몇몇 개념에 관한 명료화 작업이 이루어진다. 나아가 이를 바탕으로 A-이론과도 B-이론과도 다른 새로운 대안적인 시간 이론이 제시되고, 이 이론이 지니는 특징들과 장점들이 이야기된다.

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The syntax of Linear logic (선형논리의 통사론)

  • Cheong, Kye-Seop
    • Journal for History of Mathematics
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    • v.25 no.3
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    • pp.29-39
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    • 2012
  • As a product of modern proof theory, linear logic is a new form of logic developed for the purpose of enhancing programming language by Professor Jean-Yves Girard of Marseille University (France) in 1987 by supplementing intuitionist logic in a sophisticated manner. Thus, linear logic' s connectives can be explained using information processing terms such as sequentiality and parallel computation. For instance, A${\otimes}$B shows two processes, A and B, carried out one after another. A&B is linked to an internal indeterminate, allowing an observer to select either A or B. A${\oplus}$B is an external indeterminate, and as such, an observer knows that either A or B holds true, but does not know which process will be true. A ${\wp}$ B signifies parallel computation of process A and process B; linear negative exhibits synchronization, that is, in order for the process A to be carried out, both A and $A^{\bot}$ have to be accomplished simultaneously. Since the field of linear logic is not very active in Korea at present, this paper deals only with syntax aspect of linear logic in order to arouse interest in the subject, leaving semantics and proof nets for future studies.

The Delay-Time Characteristics of DC Discharge in the Discharge Logic Gate Plasma Display Panel (방전논리게이트 플라즈마 디스플레이 패널의 직류방전 지연특성)

  • Ryeom, Jeong-Duk;Kwak, Hee-Ro
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.21 no.1
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    • pp.28-34
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    • 2007
  • In this research, the characteristics of the DC discharge that was the logical gate input of discharge logic gate PDP newly proposed was considered. The logical output is induced by controlling the potential difference of inter-electrode according to the discharge path in the discharge logic gate. From the experimental result the discharge time lag was shortened to 1/3 and the voltage has decreased to 1/2 in the case to apply priming discharge for improving stability of these DC discharges compared with the case when it is not applied. Moreover, after the priming discharge ends, the space charge generated by this discharge influences it up to about $30[{\mu}s]$. And, as a measured result of the influence that the space charge exerts on the DC discharge with the change in time and spatial distance, it has been understood that there is a possibility that going away spatially can slip out the influence of the discharge easily as for going away from the discharge time-wise. Therefore the conclusion that the discharge logic gates of each scanning electrode can be operated independently is obtained.

An Advanced Search that Converts Natural Language into the Logic Advanced Search and with Developed History Search Method (자연어의 논리식으로의 변환을 이용한 고급검색 및 이를 활용한 히스토리 검색)

  • Lee, Daehong;Yu, Hansuk;Park, Sangwon
    • KIPS Transactions on Software and Data Engineering
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    • v.9 no.6
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    • pp.195-204
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    • 2020
  • Nowadays there are over 1.6 billion web pages and it is hard to get necessary results that user wants. Most search engines allow you to search with logical form to get accurate results. However, normal users are not familiar to search information as logical form. Therefore, they search in natural language rather than in complicated logical form. In this paper there are some suggestions to improve quality of searching results, converting natural language input by the user into logical form which can able to use advanced search engine. Users tend to make short searches due to the 'Simplicity' which is one of the features of the search form. Therefore we suggest history retrieval method; advanced version of previous suggestion to provide convenience to the normal users. We had improvement on accuracy of the search results converting natural languages to logical form and also can contain every keyword without missing any keywords using searching methods on this paper. It is expected that these search methods will contribute to the development of search engines.

The Analysis of the Ability to Control Variables and the Types of Controlling Variables by Junior High School Students (중학생들의 변인 통제 논리력과 변인 통제 유형 분석)

  • Lee, Yoon-Ha;Kang, Soon-Hee
    • Journal of The Korean Association For Science Education
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    • v.31 no.1
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    • pp.32-47
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    • 2011
  • The purpose of this study was to analyze the ability to control variables and the ways by which variables are controlled. First, the assessment criteria for evaluating the students' ability to control variables were developed for 8th grade students. Second, the ways variables are controlled were classified from student activity reports. These students' answers were categorized into six types (type A~ type F). Type A is defined as the group that excelled in recognizing the importance of controlling variables, eliminating unnecessary variables and identifying manipulated, dependent and controlled variables. Third, the scores of ability to control variables (CV score) and the classroom test of scientific reasoning (Lawson SRT) scores were measured. The results indicated that the CV score was highly correlated with Lawson SRT scores (r=.67, p<.01). Therefore, the assessment criteria developed in this study was used to evaluate the ability to control variables (CV score) and to measure the students' scientific reasoning.

A Logical Hierarchy Architecture of Location Registers for Supporting Mobility in Wireless ATM Networks (무선 ATM 망에서 이동성 지원을 위한 위치 등록기의 논리적 계층 구조)

  • 김도현;조유제
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.6A
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    • pp.361-370
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    • 2003
  • This paper attempts to improve the existing architecture of location register for location management in Private Network to Network Interface(PNNI)-based wireless ATM networks. Our approach enhances the hierarchical architecture of location registers based on a PNNI hierarchical architecture, which is referred to as the logical hierarchy architecture of location registers. This paper introduces a logical hierarchy architecture for location registers to reduce the cost of their location management. This logical hierarchy architecture of location registers begins with the lowest level physical location registers that are organized into clusters called logical groups. These logical groups are then represented in higher layers by logical nodes. These logical nodes are again grouped into clusters that are treated as single nodes by the next higher layer. In this way, all location registers are included in this tree-type logical hierarchy architecture. Compared with the existing physical hierarchy architecture of location registers, the analysis results show that the proposed logical hierarchy architecture can reduce the number of databases and thereby the average total location management cost.

A Study on Incident Detection Model using Fuzzy Logic and Traffic Pattern (퍼지논리와 교통패턴을 이용한 유고검지 모형에 관한 연구)

  • Hong, Nam-Kwan;Choi, Jin-Woo;Yang, Young-Kyu
    • Journal of Korea Spatial Information System Society
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    • v.9 no.1
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    • pp.79-90
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    • 2007
  • In this paper we proposed and implemented an incident detection model which combines fuzzy algorithm and traffic pattern in order to enhance the efficiency of incident detection for the highways with lamps. Most of the existing algorithms dealt with highways without lamps and can not be used for detecting incidents in the highways with lamps. The data used for model building are traffic volume, occupancy, and speed data. They have been collected by a loop sensor at 5 minutes interval at a point in the Internal Circular Highway of Seoul for the period of 3 months. In this model, the three parameters collected by sensor were fuzzified and combined with the daily traffic pattern of the link. The test of efficiency of the propsed model was performed by comparing the result of proposed model with traditional APID algorithm and fuzzy algorithm without the pattern data respectively. The result showed significant amount of improvement in reducing the false incident detection rate by 18%.

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Common Logic Extraction Using Hamming Distance 3 Cubes (해밍거리가 3인 큐브를 활용한 공통식 추출)

  • Kwon, Oh-Hyeong
    • The Journal of Korean Association of Computer Education
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    • v.20 no.4
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    • pp.77-84
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    • 2017
  • This paper proposes a tool that can be used as a logical expression simplification tool that can be used for deepening learning of logic circuits and further utilized as a design automation tool for optimizing semiconductor parts. The simplification method of logical expressions proposed in this paper is to find common subexpressions existing in various logical expressions and reduce the repetitive use. Finally, the goal is to minimize the number of literals used in all logical expressions. These previous studies failed to produce a common subexpression embedded in the logical expressions because they only use division principle. The proposed method uses cubes with a Hamming distance of 3 to find the common subexpression embedded between logical expressions. Experiments using benchmark circuits show that the proposed method reduces the number of literals by as much as 47% when comparing simplifications with other methods.