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http://dx.doi.org/10.5207/JIEIE.2007.21.1.028

The Delay-Time Characteristics of DC Discharge in the Discharge Logic Gate Plasma Display Panel  

Ryeom, Jeong-Duk (숭실대학교 전기공학부)
Kwak, Hee-Ro (숭실대학교)
Publication Information
Journal of the Korean Institute of Illuminating and Electrical Installation Engineers / v.21, no.1, 2007 , pp. 28-34 More about this Journal
Abstract
In this research, the characteristics of the DC discharge that was the logical gate input of discharge logic gate PDP newly proposed was considered. The logical output is induced by controlling the potential difference of inter-electrode according to the discharge path in the discharge logic gate. From the experimental result the discharge time lag was shortened to 1/3 and the voltage has decreased to 1/2 in the case to apply priming discharge for improving stability of these DC discharges compared with the case when it is not applied. Moreover, after the priming discharge ends, the space charge generated by this discharge influences it up to about $30[{\mu}s]$. And, as a measured result of the influence that the space charge exerts on the DC discharge with the change in time and spatial distance, it has been understood that there is a possibility that going away spatially can slip out the influence of the discharge easily as for going away from the discharge time-wise. Therefore the conclusion that the discharge logic gates of each scanning electrode can be operated independently is obtained.
Keywords
Cost Reduction; Plasma Display Panel; Driving Methode; Logic Gate; Discharge Logic;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
연도 인용수 순위
1 編輯部編, '2001年のFlat Panel Display 市場', 電子技術, 1999-7호, pp. 9-12, 1999
2 Mikoshiba Shigeo, 'プラズマディスプレイ最新技術', ED リサ-チ社, 1996
3 Jerry D Schermerhorn et al., 'Discharge-Logic Drive Schemes', Proc. of the SID Vol.16/2 Second Quarter pp. 81-85, 1975
4 Larry F Weber et al., 'A New Gas Discharge Logic Technigue that Reduces Circuit Complexity for AC Plasma Display Panels', Conf. Record of IDRC, pp. 502-505, Kobe, Japan, 1983
5 ,M. Ishii et al., 'Reducing the Number of Scan Drivers in AC PDPs by an Order of Magnitude Using Gas-Discharge AND Logic', Digest of SID, pp. 283-286, 1998   DOI
6 염정덕 외 1인, '플라즈마 디스플레이 패널을 위한 새로운 방전 논리소자에 관한 연구', 조명.전기설비학회논문지 제16권, 제1호, pp. 13-19, 2002
7 염정덕, 'PDP의 가격절감을 위한 새로운 방전 AND gate 및 구동기술에 관한 연구', 대한전기학회 논문지 제52권, 제6호, pp. 267-273, 2003
8 염정덕, '플라즈마 디스플레이의 공간전하 특성에 관한 연구', 조명.전기설비학회논문지 제15권, 제6호, pp. 1-7, 2001