• Title/Summary/Keyword: 위상

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Performance Analysis of digital phase shifter using Hilbert transform (힐버트 변환을 이용한 디지털 위상천이기의 성능 분석)

  • Seo, Sang Gyu;Jeong, Bong-Sik
    • Journal of the Institute of Convergence Signal Processing
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    • v.14 no.1
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    • pp.39-44
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    • 2013
  • In this paper digital phase-shifter for multi-arm spiral antennas was designed by using Hilbert transform. All frequency components in input signal are phase-shifted for 90 degree by Hilbert transform, and the transform is implemented by FIT and IFIT. Digital phase-shifter generates two signals with phase difference of 90 degree by using Hilbert transform from input signals sampled by analog-digital converter(ADC), and then the input signal is phase-shifted for a given phase by using two signals. Hilbert transform based on digital phase-shifter is designed by Xilinx System generator, and the effects of input noise, FIT point, sampling period, initial phase of input signal, and shifted phase are simulated and its results are compared with Matlab results.

System Phase Noise for Mobile Satellite Communication Service (이동형 위성통신 서비스를 위한 시스템 위상 잡음)

  • Kim Young-wan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.8
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    • pp.1780-1786
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    • 2005
  • The phase error generated in the transmission system affects the performance of digital transmission signal. The phase error are generated by random phase noise and tracking phase error due to denier phenomenon. In the mobile satellite communication system that generates the doppler frequency, which is a system with a movement, the proper system phase noise spectrum should be designed based on analyses for phase noise and static phase error effects. Based on the analyses of the doppler frequency and the phase error for bilateral satellite communication system providing an asynchronous service, the phase noise spectrums for the mobile satellite communication are designed in this paper. Also, the available transmission services under the less doppler effect are proposed and the proper signal source units for a required transmission system can be designed under the proposed system phase noise spectrum.

Material Topology Optimization Design of Structures using SIMP Approach Part II : Initial Design Domain with Topology of Partial Solids (SIMP를 이용한 구조물의 재료 위상 최적설계 Part II : 부분적인 솔리드 위상을 가지는 초기 설계영역)

  • Lee, Dong-Kyu;Park, Sung-Soo;Shin, Soo-Mi
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.20 no.1
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    • pp.19-28
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    • 2007
  • Discrete topology optimization processes of structures start from an initial design domain which is described by the topology of constant material densities. During optimization procedures, the structural topology changes in order to satisfy optimization problems in the fixed design domain, and finally, the optimization produces material density distributions with optimal topology. An introduction of initial holes in a design domain presented by Eschenauer et at. has been utilized in order to improve the optimization convergence of boundary-based shape optimization methods by generating finite changes of design variables. This means that an optimal topology depends on an initial topology with respect to topology optimization problems. In this study, it is investigated that various optimal topologies can be yielded under constraints of usable material, when partial solid phases are deposited in an initial design domain and thus initial topology is finitely changed. As a numerical application, structural topology optimization of a simple MBB-Beam is carried out, applying partial circular solid phases with varying sizes to an initial design domain.

Evaluation of usefulness of the Gated Cone-beam CT in Respiratory Gated SBRT (호흡동조 정위체부방사선치료에서 Gated Cone-beam CT의 유용성 평가)

  • Hong sung yun;Lee chung hwan;Park je wan;Song heung kwon;Yoon in ha
    • The Journal of Korean Society for Radiation Therapy
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    • v.34
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    • pp.61-72
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    • 2022
  • Purpose: Conventional CBCT(Cone-beam Computed-tomography) caused an error in the target volume due to organ movement in the area affected by respiratory movement. The purpose of this paper is to evaluate the usefulness of accuracy and time spent using the Gated CBCT function, which reduces errors when performing RGRT(respiratory gated radiation therapy), and to examine the appropriateness of phase. Materials and methods: To evaluate the usefulness of Gated CBCT, the QUASARTM respiratory motion phantom was used in the Truebeam STxTM. Using lead marker inserts, Gated CBCT was scaned 5 times for every 20~80% phase, 30~70% phase, and 40~60% phase to measure the blurring length of the lead marker, and the distance the lead marker moves from the top phase to the end of the phase was measured 5 times. Using Cedar Solid Tumor Inserts, 4DCT was scanned for every phase, 20-80%, 30-70%, and 40-60%, and the target volume was contoured and the length was measured five times in the axial direction (S-I direction). Result: In Gated CBCT scaned using lead marker inserts, the axial moving distance of the lead marker on average was measured to be 4.46cm in the full phase, 3.11cm in the 20-80% phase, 1.94cm in the 30-70% phase, 0.90cm in the 40-60% phase. In Fluoroscopy, the axial moving distance of the lead marker on average was 4.38cm and the distance on average from the top phase to the beam off phase was 3.342cm in the 20-80% phase, 3.342cm in the 30-70% phase, and 0.84cm in the 40-60% phase. Comparing the results, the difference in the full phase was 0.08cm, the 20~80% phase was 0.23cm, the 30~70% phase was 0.10cm, and the 40~60% phase was 0.07cm. The axial lengths of ITV(Internal Target Volume) and PTV(Planning Target Volume) contoured by 4DCT taken using cedar solid tumor inserts were measured to be 6.40cm and 7.40cm in the full phase, 4.96cm and 5.96cm in the 20~80% phase, 4.42cm and 5.42cm in the 30~70% phase, and 2.95cm and 3.95cm in the 40~60% phase. In the Gated CBCT, the axial lengths on average was measured to be 6.35 cm in the full phase, 5.25 cm in the 20-80% phase, 4.04 cm in the 30-70% phase, and 3.08 cm in the 40-60% phase. Comparing the results, it was confirmed that the error was within ±8.5% of ITV Conclusion: Conventional CBCT had a problem that errors occurred due to organ movement in areas affected by respiratory movement, but through this study, obtained an image similar to the target volume of the setting phase using Gated CBCT and verified its usefulness. However, as the setting phase decreases, the scan time was increases. Therefore, considering the scan time and the error in setting phase, It is recommended to apply it to patients with respiratory coordinated stereotactic radiation therapy using a wide phase of 30-70% or more.

Optical Phase-looking of Semiconductor Lasers (반도체 레이저의 광 위상 동기)

  • 신철호
    • Proceedings of the Optical Society of Korea Conference
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    • 1991.07a
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    • pp.141-146
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    • 1991
  • 최근 고분해능 분광, 코히어런트 광통신 등의 중요한 기반 기술인 레이저간의 위상 동기에 관한 연구와 이의 시스템에의 응용이 활발히 전개되고 있다. 이 논문에서는 레이저에 의한 광 위상 동기 루우프의 기본 동작 원리, 구성법, 특징, 응용 범위 및 위상 오차를 종합 분석하고, 공촛점 파브리 페로 공진기 결합 광귀환형 반도체 레이저에 의한 헤테로다인 및 호모다인 광 위상 동기 루우프의 최근 실험 결과를 소개한다.

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Design of Dual loop PLL with low noise characteristic (낮은 잡음 특성을 가지기 위해 이중 루프의 구조를 가지는 위상고정루프 구현)

  • Choi, Young-Shig;Ahn, Sung-Jin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.4
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    • pp.819-825
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    • 2016
  • In this paper, a phase locked loop structure with parallel dual loop which have a different bandwidth has been proposed. The bandwidths depending on transfer functions are obtained through dual loops. Two different bandwidths of each loop are used to suppress noise on the operating frequency range. The proposed phase locked loop has two different voltage controlled oscillator gains to control two different wide and narrow loop filters. Furthermore, it has the locking status indicator to achieve an accurate locking condition. The phase margin of $58.2^{\circ}$ for wide loop and $49.4^{\circ}$ for narrow loop is designed for stable operation and the phase margin of $45^{\circ}$ is maintained during both loops work together. It has been designed with a 1.8V 0.18um complementary metal oxide semiconductor (CMOS) process. The simulation results show that the proposed phase locked loop works stably and generates a target frequency.

A Fast Locking Phase Locked Loop with Multiple Charge Pumps (다중 전하펌프를 이용한 고속 위상고정루프)

  • Song, Youn-Gui;Choi, Young-Shig;Ryu, Ji-Goo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.71-77
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    • 2009
  • A novel phase-locked loop(PLL) architecture with multiple charge pumps for fast locking has been proposed. The proposed PLL has three charge pumps. The effective capacitance and resistance of the loop filter can be scaled up/down according to the locking status by controlling the direction and magnitude of each charge pump current. The fast locking PLL that changes its loop bandwidth through controlling charge pumps depending on locking status has been designed. The capacitor usually occupying the larger portion of the chip is also minimized with the proposed scheme. Therefore, the PLL size of $990{\mu}m\;{\times}\;670{\mu}m$ including resistors and capacitors at the bandwidth of 29.9KHz has been achieved. It has been fabricated with 3.3V $0.35{\mu}m$ CMOS process. The locking time is less than $6{\mu}s$ with the measured phase noise of -90.45dBc/Hz @1MHz at 851.2MHz output frequency.

A Fast Locking Phase-Locked Loop using a New Dual-Slope Phase Frequency Detector and Charge Pump Architecture (위상고정 시간이 빠른 새로운 듀얼 슬로프 위상고정루프)

  • Park, Jong-Ha;Kim, Hoon;Kim, Hee-Jun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.5
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    • pp.82-87
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    • 2008
  • This paper presents a new fast locking dual-slope phase-locked loop. The conventional dual-slope phase-locked loop consists of two charge pumps and two phase-frequency detectors. In this paper, the dual-slope phase-locked loop was achieved with a charge pump and a phase-frequency detector as adjusting a current of the charge pump according to the phase difference. The proposed circuit was verified by HSPICE simulation with a $0.35{\mu}m$ CMOS standard process parameter. The phase locking time of the proposed dual-slope phase-locked loop was $2.2{\mu}s$ and that of the single-slope phase-locke loop was $7{\mu}s$.

On the Errors of the Phased Beam Tracing Method for the Room Acoustic Analysis (실내음향 해석을 위한 위상 빔 추적법의 사용시 오차에 관하여)

  • Jeong, Cheol-Ho;Ih, Jeong-Guon
    • The Journal of the Acoustical Society of Korea
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    • v.27 no.1
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    • pp.1-11
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    • 2008
  • To overcome the mid frequency limitation of geometrical acoustic techniques, the phased geometrical method was suggested by introducing the phase information into the sound propagation from the source. By virtue of phase information, the phased tracing method has a definite benefit in taking the interference phenomenon at mid frequencies into account. Still, this analysis technique has suffered from difficulties in dealing with low frequency phenomena, so called, wave nature of sound. At low frequencies, diffraction at corners, edges, and obstacles can cause errors in simulating the transfer function and the impulse response. Due to the use of real valued absorption coefficient, simulated results have shown a discrepancy with measured data. Thus, incorrect phase of the reflection characteristic of a wall should be corrected. In this work, the uniform theory of diffraction was integrated into the phased beam tracing method (PBTM) and the result was compared to the ordinary PBTM. By changing the phase of the reflection coefficient, effects of phase information were investigated. Incorporating such error compensation methods, the acoustic prediction by PBTM can be further extended to low frequency range with improved accuracy in the room acoustic field.

A Fractional-N Phase Locked Loop with Multiple Phase Frequency Detector (Fractional 스퍼 감쇄 위상/주파수검출기를 이용한 fractional-N 주파수 합성기)

  • Choi, Young-Shig;Choi, Hyek-Hwan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.11
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    • pp.2444-2450
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    • 2011
  • In this paper, we propose the low fractional spur phase-locked loop(PLL) with multiple phase-frequency detector(PFD). The fractional spurs are suppressed by using a new PFD. The new PFD architecture with two different edge detection methods is used to suppress the fractional spur by limiting a maximum width of the output signals of PFD. The proposed PLL was simulated by HSPICE using a 0.35m CMOS parameters. The simulation results show that the proposed PLL is able to suppress fractional spurs with fast locking.