• Title/Summary/Keyword: 위상보상

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Current Compensation Method of a Three Phase PWM Converter under Distorted Source Voltages (왜곡된 전원 전압 하에서 삼상 PWM 컨버터의 전류 보상 기법)

  • Park, Nae-Chun;Mok, Hyung-Soo;Ji, Jun-Keun;Kim, Sang-Hoon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.13 no.5
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    • pp.352-359
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    • 2008
  • This paper proposes a current compensation method of a three phase PWM converter. The phase angle of utility voltage is essential to control a PWM converter. In the case of using synchronous reference frame PLL to detect the phase angle of the distorted source, harmonics of source voltage cause the phase angle to be distorted. PWM converter control by the distorted phase angle results in input current harmonics. This paper proposes a current compensation method which can limit THD of Input currents below to 5% that is the harmonic current requirements by IEEE std. 519. Its validity is verified by simulation and experiment.

A Study of Current Ripple Reduction Due to Offset Error in SRF-PLL for Single-Phase Grid-connected Converters (단상 계통연계형 컨버터의 SRF-PLL 옵셋 오차로 인한 전류 맥동 저감에 관한 연구)

  • Seong, Eui-Seok;Jeong, Byeong-Guk;Hwang, Seon-Hwan;Kim, Jang-Mok
    • Proceedings of the KIPE Conference
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    • 2014.07a
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    • pp.451-452
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    • 2014
  • 본 논문에서는 단상 계통연계형 컨버터의 전원 위상각을 추종함에 있어 필수적인 전압 센서의 옵셋 오차에 대한 영향을 분석하고 이를 검출 및 보상하기 위한 알고리즘을 제안하였다. 전원전압 측정에 따른 옵셋 오차는 전원 주파수의 1배 맥동을 야기하여 전원 위상각이 왜곡된다. 왜곡된 전원 위상각에 의한 좌표변환시 동기 좌표계 dq축 전류에 전원 주파수 1배의 맥동을 야기하며 이는 계통측 상전류에 직류성분과 전원 주파수 2배의 고조파 성분을 발생시키게 된다. 따라서, 본 논문에서는 전원측정시 야기되는 옵셋 오차의 영향을 분석하고 이의 검출신호로 전원 위상각 제어기의 적분출력을 선정하였다. 또한 RMS(Root Mean Square) 기법을 이용하여 옵셋 성분을 검출 및 보상하는 알고리즘을 제안하였다. 제안된 알고리즘의 성능은 시뮬레이션과 실험을 통하여 검증하였다.

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Robust Digital Nonlinear Friction Compensation - Theory (견실한 비선형 마찰보상 이산제어 - 이론)

  • 강민식;김창제
    • Journal of the Korean Society for Precision Engineering
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    • v.14 no.4
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    • pp.88-96
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    • 1997
  • This paper suggests a new non-linear friction compensation for digital control systems. This control adopts a hysteresis nonlinear element which can introduce the phase lead of the control system to compensate the phase delay comes from the inherent time delay of a digital control. A proper Lyapunov function is selected and the Lyapunov direct method is used to prove the asymptotic stability of the suggested control.

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Robust Digital Nonlinear Friction Compensation (견실한 비선형 마찰보상 이산제어)

  • 강민식;송원길;김창재
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1996.11a
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    • pp.987-993
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    • 1996
  • This report suggests a new non-linear friction compensation for digital control systems. This control adopts a hysteric nonlinear clement which can introduce the phase lead of the control system to compensate the phase delay comes from the inherent time delay of a digital control. The Lyapunov direct method is used to prove the asymtotic stability of the suggested control, and the stability and the effectiveness are verified analytically and experimentally on a single axis servo driving system.

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Almost linear-phase compensator for Cascaded Integrator-Comb filter (Cascaded Integrator-Comb 필터를 위한 근사 선형 위상 보상기)

  • Lee Kyu-Ha;Lee Chung-yong
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.42 no.4 s.304
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    • pp.153-158
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    • 2005
  • In this paper, a filter is proposed to compensate droop of the CIC filter for SDR. The proposed compensation filter has almost linear-phase characteristic, requires low operational complexity, and is cost-effective due to its second-order characteristic and lowest operational rate in the baseband.. Especially, it compensates droop in the passband with little performance degradation in the stopband. It is shown, by a design example and its performance analysis, that the proposed compensation method gives performance enhancement in communication systems. It is also shown that the proposed method is superior to conventional ones in view of memory usage and computational load.

Baseband Signal Compensation Scheme for Frequency Selective Fading Channel and RF Impairments in OFDM System (OFDM 시스템에서 주파수 선택적 페이딩 채널과 RF 불완전 변환 극복을 위한 기저대역 신호보상 기법)

  • Kim, Jae-Kil;Kim, Jeong-Been;Hwang, Jin-Yong;Shin, Dong-Chul;Ahn, Jae-Min
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.1C
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    • pp.55-64
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    • 2010
  • In this paper, we propose a new compensation scheme for combined channel distortions and RF impairments based on the analysis of the impacts of IQ(In-phase/Quadrature) imbalance and phase noise on the OFDM(Orthogonal Frequency Division Multiplexing) system in the direct conversion transceiver and frequency selective fading channel distortion. The proposed scheme estimates the combined distortion by the use of training symbols and the residual distortion by pilot symbols and compensates the combined distortion, including IQ imbalance, phase noise and multipath fading at the same time. The simulation results show that the proposed scheme compensates the combined distortion of IQ imbalance, phase noise and multipath fading simultaneously.

Design of PID Controller to Compensate for Gain and Phase Margin Base on Gradient Descent Method (경사 하강법에 근거한 이득여유와 위상여유를 보상하는 PID 제어기 설계)

  • Park, Jae-Hoon;Cho, Joon-Ho;Choi, Jung-Nae;Lee, Won-Hyuk;Hwang, Hyung-Soo
    • Proceedings of the KIEE Conference
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    • 2005.07d
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    • pp.2552-2554
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    • 2005
  • 제어기 설계에서 이득여유와 위상여유는 견실성 및 안정도 판별의 중요한 척도로 사용되며, 그 중 위상여유는 시스템의 성능지수와 관련된다. 이와 같은 이유로 이득여유와 위상여유의 안정도를 고려한 제어기의 설계방법이 연구되어지고 있다. 근래 Weng Khuen Ho와 Chang Chieh Hang이 제안한 설계방법은 복잡한 계산을 필요로 하는 arctan 함수를 1차 선형함수로 근사화 하여 복잡도를 감소시키면서도 원하는 이득여유와 위상여유를 만족시키는 제어기의 파라미터를 찾았다. 하지만 이 방법은 실제의 arctan 함수를 사용하는 것이 아니라 근사화된 수식을 사용함으로써 오차가 수반되어 원하는 설계조건을 만족 하지 못한다. 따라서 본 논문은 이러한 오차를 최소화하기 위해서 최적화 알고리즘을 이용한 이득여유와 위상여유를 보상하는 PID 제어기를 설계하였다.

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Small-size PLL with time constant comparator (시정수 비교기를 이용한 작은 크기의 위상고정루프)

  • Ko, Gi-Yeong;Choi, Young-Shig
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.11
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    • pp.2009-2014
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    • 2017
  • A novel structure of phase locked loop (PLL) with a time constant comparator and a current compensator has been proposed. The proposed PLL uses small capacitors which are impossible for stable operation in a conventional PLL. It is small enough to be integrated into a single chip. The time constant comparator detects the loop filter output voltage variations using signals which are passed through small and large RC time constants. The signal from the large RC time constant node is the average of the loop filter output voltage. The output voltage of another node is approximately equal to the present loop filter voltage. The output of the time constant comparator controls a current compensator and charge/discharge small size loop filter capacitors. It makes the proposed PLL operate stably. It has been simulated and proved by HSPICE in a CMOS $0.18{\mu}m$ 1.8V process.

A Phase Noise Reduction Scheme for OFDM Systems (OFDM 시스템의 위상잡음 감쇄기법)

  • Park Kyung-won;Jeon Won-gi;Paik Jong-ho;Yang Won-young;Cho Yong-soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.6A
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    • pp.465-473
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    • 2005
  • In this paper, the reduction scheme of Interchannel Interference(ICI) caused by the phase noise in Orthogonal Frequency Division Multiplexing(OFDM) systems for archiving high data rates is proposed. The performance of conventional common phase error(CPE) compensation method is degraded by the phase noise with wide 3dB bandwidth in OFDM systems width a higher-order constellation. After estimating dominant ICI coefficients using pilot subcarriers and data subcarriers adjacent to pilot subcarriers, the proposed scheme compensates OFDM signals distorted by the phase noise using estimated coefficients in the time or frequency domain. Also, in order to determine the length of dominant ICI coefficients effectively, the estimation method of the 3dB bandwidth of the phase noise is proposed. The proposed phase noise reduction method is shown to improve the Bit Error Ratio(BER) performance compared with the conventional CPE compensation.

Modeling and Application Research of Zero Crossing Detection Circuit (Zero Crossing Detection 회로 Modeling 및 응용연구)

  • Jeong, Sungin
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.20 no.4
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    • pp.143-148
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    • 2020
  • In the case of a system that detects and controls the phase of an alternating voltage, the analog control method compensates the phase offset part by filtering for the detected phase and applies it to the control. However, in the digital control method, precise control cannot be achieved due to an error between the operating frequency of the microprocessor or the microcontroller and the input phase time when controlled using such phase detection. In general, when the method used is a certain time, the accumulated error is compensated and adjusted at random. To solve this problem, a method of detecting a zero point in real time and compensating for the operating frequency of the microprocessor is needed. Therefore, the research to be performed in this paper to reduce these errors and apply them to precise digital control is as follows. 1) Research on how to implement Zero Crossing Detection algorithm through simulation modeling to compensate the zero point to match the operating frequency through detection. 2) A study on the method of detecting zero points in real time through the Zero Crossing Detection design using a microcontroller and compensating for the operating frequency of the microprocessor. 3) A study on the estimation of the rotor position of BLDC motors using the Zero Crossing Detection circuit.