• Journal of the Korean Institute of Telematics and Electronics
• /
• v.9 no.4
• /
• pp.7-16
• /
• 1972

A prototype of photoelectric photometer has been developed by all solid state operational amplifiers. The amplification of low-level anode currents from photomultiplier tube corresponding to a given incident light intensity and logarithmic transfer for star's magnitude nleasurements are achieved by the same operational amplifier. It is important to select low input bias currents for stable performance because the resolution is primarily limited by the bias currents. As such, they offer a higher reliable and economical for a large number of electrometer amplifier applications which have traditionaly been fulfilled by vacuum electrometer tubes or vibrating reed electrometers.

• 전기의세계
• /
• v.11
• /
• pp.37-43
• /
• 1963

제어계에서 사용되는 D.C. amplifier는 그 이용의 범위가 많으나 실제로 computer에 적용시킨것은 1947년에 Ragazzini에 의하여 연산증폭기(Operational amplifier)를 완성하므로서 비로서 시작한 것이다. 고로 역사가 짧은 이에 대한 연구와 사용문제는 아직까지도 계속하고 있는 것이다. 따라서 본고에서는 연산증폭기회로에 대한 조립을 구체적으로 설명하고 그의 특성을 실험으로서 얻어 TRIGA MARK-II 원자로의 simulating에 사용시킬수 있게 그 이용가치를 취급하고저 한것이다.

• Proceedings of the IEEK Conference
• /
• 2003.07b
• /
• pp.915-918
• /
• 2003

본 논문에서는 높은 슬루율을 가지고 전압편차 (offset)보상 기능을 가지면서도 전력소모가 적은 고계조 TFT-LCD 데이터 드라이버 구동용 단일이득 연산증폭기(unit gain op-amp)의 바이어스 회로 및 구동 방법을 제안하였다. 제안한 단일이득 연산증폭기는 일반적으로 사용되고 있는 전압편차 보상기능을 가진 단일이득 연산증폭기에 adaptive bias기능을 추가한 것으로써, 기존 구조에 비해 50%이상의 소비 전력 절감 효율을 보였다.

• Journal of Sensor Science and Technology
• /
• v.6 no.2
• /
• pp.145-154
• /
• 1997

Based on a new search strategy using circuit simulation and simulated annealing with local search, a technique for design automation of high-performance operational amplifiers is proposed. For arbitrary circuit topology and performance specifications, through discrete optimization of a cost function with discrete design variables the design of operational amplifiers is performed. A special-purpose circuit simulator and some heuristics are used to reduce the design time. Through the design of a low-power high-speed fully differential CMOS operational amplifier usable in smart sensors and 10-b 25-MS/s pipelined A/D converters, it has been demonstrated that a design tool developed using the proposed technique can be used for designing high-performance operational amplifiers with less design knowledge and less design effort.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• v.9 no.2
• /
• pp.873-876
• /
• 2005

This paper presents a new current transient test technique for wideband CMOS Op Amps. This technique monitors the transient power supply current and output responses of the CMOS Op Amp to automatically differentiate faulty and fault-free op amps. The wideband op amp is designed using 0.25${\mu}$m CMOS technology. We present detailed simulation results for a wideband op amp. We show that catastrophic faults in op amps can be detected and analyzed by monitoring power supply currents and output responses. This technique is inexpensive and simple.

• Journal of Sensor Science and Technology
• /
• v.1 no.1
• /
• pp.13-21
• /
• 1992

We have constructed the magneto-operational amplifier(MOP) using the advantages of Hall device and an operational amplifier. The MOP necessarily requires a high impedance circuit, a differential-to-single-ended convert-sion circuit and feedback-input-element for operational amplifier characteristics. We have presented a new differential-to-single-ended conversion operational amplifier(DSCOP) having such characteristics. We have designed the MOP using the DSCOP and Hall device and simulated its characteristics, and finally we have constructed the system with discrete elements, and measured its magnetic characteristics.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.38 no.1
• /
• pp.44-54
• /
• 2001

In this paper, a novel test method is proposed to detect the hard and soft fault in analog circuits. The proposed test method makes use of the offset voltage, which is one of the op-amps characteristics. During the test mode, CUT is modified to unit gain op-amps with feedback loop. When the input of the op-amp is grounded, a good circuit has a small offset voltage, but a faulty circuit has a large offset voltage. Faults in the op-amp which cause the offset voltage exceeding predefined range of tolerance can be detected. In the proposed method, no test vector is required to be applied. Therefore the test vector generation problem is eliminated and the test time and cost is reduced. In this note, the validity of the proposed test method has been verified through the example of the dual slope A/D converter. The HSPICE simulations results affirm that the presented method assures a high fault coverage.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.18 no.6
• /
• pp.38-43
• /
• 1981

In this paper an actively compensatedfinite gain amplifie. (FGA) with positive gain using 4 operational amplifiers and resistors is propo sod, and an application is considered in an active RC filter. By cancelling the effect of the GB's up to the third-order term of s on the transfer function, the proposed FGA has the extended frequency range over that of the FGA using 3 operational amplifiers. When this FGA is applied to an active RC filter with Pole frequncy of 100kHz, the magnitude error of the frequency characteristics of the filter is less than 2%.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.37 no.6
• /
• pp.85-96
• /
• 2000

It is necessary that fully differential operational amplifier circuit should drive an external load in the VLSI design such as SCF(Switched Capacitor Filter), D/A Converter, A/D Converter, Telecommunication Circuit and etc. The conventional CMOS operational amplifier circuit has many problems according to CMOS technique. Firstly, Capacity of large loads are not able to operate well. The problem can be solve to use class AB stages. But large loads are operate a difficult, because an element of existing CMOS has a quadratic functional relation with input and output voltage versus output current. Secondly, Whole circuit of dynamic range decrease, because a range of input and output voltages go down according as increasing of intergration rate drop supply voltage. The problem can be improved by employing fully differential operational amplifier using differential output stage with wide output swing. In this paper, we proposed new current mirror has large output impedance and good current matching with input an output current and compared with characteristics for operational amplifier using cascoded current mirror. To obtain large output swing and low power consumption we suggest a fully differential operational amplifier. The circuit employs an output stage composed new current mirror and two amplifier stage. The proposed circuit is layout and circuit of capability is inspected through simulation program(SPICE3f).

• Journal of IKEEE
• /
• v.22 no.4
• /
• pp.1025-1030
• /
• 2018

The proposed modulator is designed by utilizing a conventional structure employing time division technique to realize the 4th order delta-sigma modulator using one op-amp. In order to reduce the influence of KT/C noise, the capacitance in the first and second integrators reused was chosen to be 20pF and capacitance of third and fourth integrators was designed to be 1pF. The stage variable technique in the low power reconfigurable op-amp was used to solve the stability issue due to different capacitance loads for the reduction of KT/C noise. This technique enabled the proposed modulator to reduce the power consumption of 15% with respect to the conventional one. The proposed modulator was fabricated with 0.18um CMOS N-well 1 poly 6 metal process and consumes 305uW at supply voltage of 1.8V. The measurement results demonstrated that SNDR, ENOB, DR, FoM(Walden), and FoM(Schreier) were 66.3 dB, 10.6 bits, 83 dB, 98 pJ/step, and 142.8 dB at the sampling frequency of 256kHz, oversampling ratio of 128, clock frequency of 1.024 MHz, and input frequency of 250 Hz, respectively.