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Design and Implementation of Context Synchronizer for Efficient Offloading Execution in IoT-Cloud Fusion Virtual Machine (IoT-Cloud 융합 가상 기계에서 효율적인 오프로딩 실행을 위한 문맥 동기화기의 설계 및 구현)

  • Kim, Sangsu;Son, Yunsik;Lee, Yangsun
    • Proceedings of the Korea Information Processing Society Conference
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    • 2017.11a
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    • pp.1199-1202
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    • 2017
  • IoT-Cloud 융합 가상 기계 시스템은 저성능의 사물인터넷 장비에서 고성능 클라우드 서버의 연산력을 제공받는 오프로딩 기법을 사용한다. 오프로딩 기법을 사용하는 경우 실행 대상 프로그램은 사물인터넷 장비와 클라우드 서버 사이에 일관성이 유지되어야하기 때문에 문맥 동기화가 필요하다. 기존 IoT-Cloud 융합 가상 기계의 문맥 동기화 방식은 전체 문맥 동기화를 시도하기 때문에 네트워크 오버헤드가 증가하여 비효율적이다. 네트워크 오버헤드는 오프로딩 실행 성능을 기존보다 감소시킬 수 있기 때문에 효율적인 오프로딩을 위해서는 오프로딩 실행에 필요한 문맥 정보만을 동기화하여 네트워크 오버헤드를 줄여야 한다. 본 논문에서는 효율적인 오프로딩 실행을 위해 정적 프로파일링을 통해 추출된 문맥 정보를 기반으로 오프로딩 실행에 필요한 문맥 정보만을 동기화하는 문맥 동기화기를 설계 및 구현하였다. 오프로딩 실행에 필요한 문맥 정보만 동기화가 이뤄지면 문맥 동기화 시 발생하는 네트워크 오버헤드의 크기가 줄어들기 때문에 효율적인 오프로딩 실행이 가능하다.

A Design of Programmable Fragment Shader with Reduction of Memory Transfer Time (메모리 전송 효율을 개선한 programmable Fragment 쉐이더 설계)

  • Park, Tae-Ryoung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.12
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    • pp.2675-2680
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    • 2010
  • Computation steps for 3D graphic processing consist of two stages - fixed operation stage and programming required stage. Using this characteristic of 3D pipeline, a hybrid structure between graphics hardware designed by fixed structure and programmable hardware based on instructions, can handle graphic processing more efficiently. In this paper, fragment Shader is designed under this hybrid structure. It also supports OpenGL ES 2.0. Interior interface is optimized to reduce the delay of entire pipeline, which may be occurred by data I/O between the fixed hardware and the Shader. Interior register group of the Shader is designed by an interleaved structure to improve the register space and processing speed.

Framework Implementation of Image-Based Indoor Localization System Using Parallel Distributed Computing (병렬 분산 처리를 이용한 영상 기반 실내 위치인식 시스템의 프레임워크 구현)

  • Kwon, Beom;Jeon, Donghyun;Kim, Jongyoo;Kim, Junghwan;Kim, Doyoung;Song, Hyewon;Lee, Sanghoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.11
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    • pp.1490-1501
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    • 2016
  • In this paper, we propose an image-based indoor localization system using parallel distributed computing. In order to reduce computation time for indoor localization, an scale invariant feature transform (SIFT) algorithm is performed in parallel by using Apache Spark. Toward this goal, we propose a novel image processing interface of Apache Spark. The experimental results show that the speed of the proposed system is about 3.6 times better than that of the conventional system.

Implemented Logic Circuits of Fuzzy Inference Engine for DC Servo Control Using decomposition of $\alpha$-level fuzzy set ($\alpha$-레벨 퍼지집합 분해에 의한 직류 서보제어용 퍼지추론 연산회로 구현)

  • 이요섭;손의식;홍순일
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.5
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    • pp.1050-1057
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    • 2004
  • The purpose of study is development of a fuzzy controller which independent of a computer and its software for fuzzy control of servo system. This paper describes a method of approximate reasoning for fuzzy control of servo system, based on decomposition of $\alpha$-level fuzzy sets, It is propose that fuzzy logic algorithm is a body from fuzzy inference to defuzzificaion in cases where the output variable u directly is generated PWM. The effectiveness of quantified $\alpha$-levels on input/output characteristics of fuzzy controller and output response of DC servo system is investigated. It is concluded that $\alpha$-cut 4 levels give a sufficient result for fuzzy control performance of DC servo system. The experimental results shows that the proposed hardware method is effective for practical applications of DC servo system.

Performance Measurement of Single-board System for Mobile BCI System (이동식 BCI 시스템을 위한 싱글보드 시스템의 성능측정)

  • Lee, Hyo Jong;Kim, Hyun Kyu;Gao, Yongbin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.3
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    • pp.136-144
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    • 2015
  • The EEG system can be classified as a wired or wireless device. Each device used for the medical or entertainment purposes. The collected EEG signals from sensor are analyzed using feature extractions. A wireless EEG system provides good portability and convenience, however, it requires a mobile system that has heavy computing power. In this paper a single board system is proposed to handle EEG signal processing for BCI applications. Unfortunately, the computing power of a single board system is limited unlike general desktop systems. Thus, parallel approach using multiple single board systems is investigated. The parallel EEG signal processing system that we built demonstrates superlinear speedup for an EEG signal processing algorithm.

A Study on the Construction of Parallel Multiplier over GF2m) (GF(2m) 상에서의 병렬 승산기 설계에 관한 연구)

  • Han, Sung-Il
    • Journal of the Korea Society of Computer and Information
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    • v.17 no.3
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    • pp.1-10
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    • 2012
  • A low-complexity Multiplication over GF(2m) and multiplier circuit has been proposed by using cyclic-shift coefficients and the irreducible trinomial. The proposed circuit has the parallel input/output architecture and shows the lower-complexity than others with the characteristics of the cyclic-shift coefficients and the irreducible trinomial modular computation. The proposed multiplier is composed of $2m^2$ 2-input AND gates and m (m+2) 2-input XOR gates without the memories and switches. And the minimum propagation delay is $T_A+(2+{\lceil}log_2m{\rceil})T_X$. The Proposed circuit architecture is well suited to VLSI implementation because it is simple, regular and modular.

An Efficient Index Buffer Management Scheme for a B+ tree on Flash Memory (플래시 메모리상에 B+트리를 위한 효율적인 색인 버퍼 관리 정책)

  • Lee, Hyun-Seob;Joo, Young-Do;Lee, Dong-Ho
    • The KIPS Transactions:PartD
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    • v.14D no.7
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    • pp.719-726
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    • 2007
  • Recently, NAND flash memory has been used for a storage device in various mobile computing devices such as MP3 players, mobile phones and laptops because of its shock-resistant, low-power consumption, and none-volatile properties. However, due to the very distinct characteristics of flash memory, disk based systems and applications may result in severe performance degradation when directly adopting them on flash memory storage systems. Especially, when a B-tree is constructed, intensive overwrite operations may be caused by record inserting, deleting, and its reorganizing, This could result in severe performance degradation on NAND flash memory. In this paper, we propose an efficient buffer management scheme, called IBSF, which eliminates redundant index units in the index buffer and then delays the time that the index buffer is filled up. Consequently, IBSF significantly reduces the number of write operations to a flash memory when constructing a B-tree. We also show that IBSF yields a better performance on a flash memory by comparing it to the related technique called BFTL through various experiments.

Automatic Detection of Vehicle Area Rectangle and Traffic Volume Measurement through Vehicle Sub-Shadow Accumulation (차량 그림자 누적을 통한 검지 영역 자동 설정 및 교통량 측정 방법)

  • Kim, Jee-Wan;Lee, Jaesung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.8
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    • pp.1885-1894
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    • 2014
  • There are various high-performance algorithms in the area of the existing VDSs (vehicle detection systems). However, they requires a large amount of computational time-complexity and their systems generally are very expensive and consumes high-power. This paper proposes real-time traffic information detection algorithm that can be applied to low-cost, low-power, and open development platform such as Android. This algorithm uses a vehicle's sub-shadow to set ROI(region of interest) and to count vehicles using a location of the sub-shadow and the vehicle. The proposed algorithm is able to count the vehicles per each roads and each directions separately. The experiment result show that the detection rate for going-up vehicles is 94.1% and that for going-down vehicles is 97.1%. These results are close to or surpasses 95%, the detection rate of commercial loop detectors.

Problem Analysis and Recommendations of CPU Contents in Korean Middle School Informatics Textbooks (중학교 정보 교과서에 제시된 중앙처리장치 내용 문제점 분석 및 개선 방안)

  • Lee, Sangwook;Suh, Taeweon
    • KIPS Transactions on Computer and Communication Systems
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    • v.2 no.4
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    • pp.143-150
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    • 2013
  • The School Curriculum amend in 2007 mandates the contents from which students can learn the principles and concepts of computer science. Computer Science is one of the most rapidly changing subjects, and the Informatics textbook should accurately explain the basic principles and concepts based on the latest technology. However, we found that the middle school textbooks in circulation lack accuracy and consistency in describing CPU. This paper attempted to discover the root-cause of the fallacy and suggest timely and appropriate explanation based on the historical and technical analysis. According to our study, it is appropriate to state that CPU is composed of datapath and control unit. The Datapath performs operations on data and holds data temporarily, and it is composed of the hardware components such as memory, register, ALU and adder. The Control unit decides the operation types of datapath elements, main memory and I/O devices. Nevertheless, considering the technological literacy of middle school students, we suggest the terms, 'arithmetic part' and 'control part' instead of datapath and control unit.

Design and Implementation of NVM-based Concurrent Journaling Scheme (저널링 파일 시스템을 위한 비휘발성 메모리 기반 병행적 저널링 기법의 설계 및 구현)

  • Pak, Suehee;Lee, Eunyoung;Han, Hyuck
    • The Journal of the Korea Contents Association
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    • v.21 no.7
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    • pp.157-163
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    • 2021
  • A single write operation in a file system can modify multiple data, but these changes in the file system are not atomically written to disk. Thus, for the consistency of the file system, conventional journaling guarantees crash consistency instead of sacrificing the system performance. It is known that using non-volatile memory as a journal space can alleviate performance degradation due to low latency and byte-level accessibility of non-volatile memory. However, none of the journaling techniques considering non-volatile memory provide scalability. In this paper, journal space on non-volatile memory is divided into multiple regions for scalable journaling, thus dispersing concentrated operations in one region. Second, the journal area-specific operator structure is used to accelerate data write operations to storage devices. We apply the proposed technique to JFS to evaluate it on multi-core servers equipped with high-performance storage devices. The evaluation results show that the proposed technique performs better than the existing technique of the NVM-based journaling file system.