• Title/Summary/Keyword: 반도체 Test

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Development of Electronic Personal Dosimeter with Hybrid Preamplifier using Semiconductor Detector (반도체 검출기를 이용한 Hybrid 전치증폭기형 전자식 개인선량계 개발)

  • Lee, B.J.;Kim, B.H.;Chang, S.Y.;Kim, J.S.;Rho, S.R.
    • Journal of Radiation Protection and Research
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    • v.27 no.1
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    • pp.51-57
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    • 2002
  • An electronic personal dosimeter(EPD) with hybrid type preamplifier adopting a semiconductor detector as a radiation detector has been developed, manufactured and test-evaluated. The radiation detection characteristics of this EPD has been performance-tested by using a reference photon radiation field. After several test-irradiations to a $^{137}Cs$ gamma radiation source the radiation detection sensitivity of this EPD appeared to be $3.8\;cps/Gy{\cdot}h^{-1}$. The linearity of radiation response was kept within 8% of the dose equivalent ranges of $10{\mu}Sv{\sim}4Sv$ and the angular dependence was under less than 4% in angles of ${\pm}60^{\circ}$. It was confirmed that the energy response range was in $60{\sim}1,250keV$ given in the ISO standard. This EPD satisfied the international criteria for the EPD in the mechanical and the environmental performance test for 9 test categories according to IEC 61526.

Test Method for Particle Removal Characteristic of Equipment Fan Filter Unit (EFFU) (Equipment Fan Filter Unit (EFFU)의 Particle 제거 성능평가 방법)

  • Lee, Yang-Woo;Ahn, Kang-Ho
    • Journal of the Semiconductor & Display Technology
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    • v.11 no.2
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    • pp.59-62
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    • 2012
  • This test method covers a procedure for measuring particle removal characteristic of equipment fan filter unit(EFFU) installed inside of semiconductor process equipments, FPD manufacturing equipments and so on. Since EFFU is a combination of air filter and the assembly of fan, motor and frame, the integrity of these parts is very important for the performance of EFFU. So a conventional particle removal test method for air filters is not suitable for EFFU particle removal performance. This test method defines an evaluation method for EFFU which is installed inside an enclosed space to remove particles that are generated inside process equipment. The particle removal performance of EFFUs is usually depending on the performance of filter media and air flow rate. To understand a performance of an EFFU, the filter media characteristic, air flow rate and the integrity of EFFU parts should be considered simultaneously. This test method is intended to demonstrate the system performance of an EFFU and successfully evaluated EFFU performance characteristics.

A Method of Test Case Generation Based on Behavioral Model for Automotive SPICE (Automotive SPICE를 위한 행위 모델 기반의 테스트 케이스 생성 기법)

  • Kim, Choong S.;Yang, Jae-Soo;Park, Young B.
    • Journal of the Semiconductor & Display Technology
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    • v.16 no.3
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    • pp.71-77
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    • 2017
  • As the automobile industry has shifted to software, the Automotive SPICE standard has been established to ensure efficient product development process and quality. In the assessment model, the HIS Scope is the minimum standard for small and medium automotive electric companies to meet OEM requirements. However, in order to achieve the HIS Scope, the output of each process stage that meets the verification criteria of Automotive SPICE must be created. In particular, the test phase takes a lot of resources, which is a big burden for small and medium-sized companies. In this paper, we propose a methodology for creating test cases of software integration test phase based on UML sequence diagram, which is a software design phase of Automotive SPICE HIS Scope, by applying behavior model based testing method. We also propose a tool chain for automating the creation process. This will reduce the resources required to create a test case.

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An Effective Multiple Transition Pattern Generation Method for Signal Integrity Test on Interconnections (Signal Integrity 연결선 테스트용 다중천이 패턴 생성방안)

  • Kim, Yong-Joon;Yang, Myung-Hoon;Park, Young-Kyu;Lee, Dae-Yeal;Yoon, Hyun-Jun;Kang, Sung-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.1
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    • pp.14-19
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    • 2008
  • Semiconductor testing area challenges many testing issues due to the minimization and ultra high performance of current semiconductors. Among these issues, signal integrity test on interconnections must be solved for highly integrated circuits like SoC. In this paper, we propose an effective pattern application method for signal integrity test on interconnects. Proposed method can be applied by using boundary scan architecture and very efficient test can be preceded with pretty short test time.

Scheduling of Wafer Burn-In Test Process Using Simulation and Reinforcement Learning (강화학습과 시뮬레이션을 활용한 Wafer Burn-in Test 공정 스케줄링)

  • Soon-Woo Kwon;Won-Jun Oh;Seong-Hyeok Ahn;Hyun-Seo Lee;Hoyeoul Lee; In-Beom Park
    • Journal of the Semiconductor & Display Technology
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    • v.23 no.2
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    • pp.107-113
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    • 2024
  • Scheduling of semiconductor test facilities has been crucial since effective scheduling contributes to the profits of semiconductor enterprises and enhances the quality of semiconductor products. This study aims to solve the scheduling problems for the wafer burn-in test facilities of the semiconductor back-end process by utilizing simulation and deep reinforcement learning-based methods. To solve the scheduling problem considered in this study. we propose novel state, action, and reward designs based on the Markov decision process. Furthermore, a neural network is trained by employing the recent RL-based method, named proximal policy optimization. Experimental results showed that the proposed method outperformed traditional heuristic-based scheduling techniques, achieving a higher due date compliance rate of jobs in terms of total job completion time.

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Reliability Test System for Semiconductor Equipment & Part (장비/부품의 신뢰성 평가 시스템 구축 방안)

  • 황희융;설용태;이희환;차옥환
    • Proceedings of the KAIS Fall Conference
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    • 2002.05a
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    • pp.93-95
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    • 2002
  • 반도체 제조장비는 매우 높은 정밀도와 신뢰성이 요구되는 초정밀 시스템으로서 개발이 완료되어 실제 생산라인에 투입되기까지는 오랜 시간 동안 엄격한 시험평가를 통하여 신뢰성이 입증되어야 한다. 그러나 국내 중소 업계의 경우 고가 시험평가 설비를 보유하고 있지 않아 연구개발에 많은 어려움을 겪고 있다. 본 과제는 반도체 제조장비와 부품의 신뢰성 평가를 위한 시스템 구축방안에 대한 사항이다.

Pulse-Grouping Control Method for High power Density DC/DC Converters

  • Kang, Shin-Ho;Jang, Jun-Ho;Lee, Jun-Young
    • Journal of the Semiconductor & Display Technology
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    • v.6 no.2 s.19
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    • pp.45-48
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    • 2007
  • The proposed method offers an improved DC/DC converter scheme to increase power density. It is based on half-bridge topology with newly introduced pulse-grouping control method, which helps to reduce the transformer size and the volume of semiconductor devices maintaining high efficiency. Test results with 85W(18.5V/4.6A) design shows that the measured efficiency is 93.5% with power density of $36W/in^3$.

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Linear System Analysis Using Wavelets Transform: Application to Ultrasonic Signal Analysis (웨이브렛 변환을 이용한 선형시스템 분석: 초음파 신호 해석의 응용)

  • Joo, Young Bok
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.4
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    • pp.77-83
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    • 2020
  • The Linear system analysis for physical system is very powerful tool for system diagnostic utilizing relationship between the input signal and output signal. This method utilized generally to investigate physical properties of system and the nondestructive test by ultrasonic signals. This method can be explained by linear system theory. In this paper the Continuous Wavelets Transform is utilized to search the relation between the linear system and continuous wavelets transform.

CTIS: Cross-platform Tester Interface Software for Memory Semiconductor (메모리 반도체 검사 장비 인터페이스를 위한 크로스플랫폼 소프트웨어 기술)

  • Kim, Dong Su;Kang, Dong Hyun;Lee, Eun Seok;Lee, Kyu Sung;Eom, Young Ik
    • KIISE Transactions on Computing Practices
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    • v.21 no.10
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    • pp.645-650
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    • 2015
  • Tester Interface Software (TIS) provides all software functions that are necessary for a testing device to perform the test process on a memory semiconductor package from the time the device is put into the test equipment until the device is discharged from the equipment. TIS should perform the same work over all types of equipment regardless of their tester models. However, TIS has been developed and managed independently of the tester models because there are various equipment and computer models that are used in the test process. Therefore, more maintenance, time and cost are required for development, which adversely affects the quality of the software, and the problem becomes more serious when the new tester model is introduced. In this paper, we propose the Cross-platform Tester Interface Software (CTIS) framework, which can be integrated and operated on heterogeneous equipment and OSs.

A valve test system for series connected power semiconductor using resonant circuit (공진회로를 이용한 직렬연결 전력용 반도체 소자의 밸브 시험 시스템)

  • Yoo, H.H.;Han, Y.S.;Han, S.H.;Choi, J.Y.;Kim, J.M.;Kim, S.Y.;Yoon, J.S.
    • Proceedings of the KIEE Conference
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    • 2006.10d
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    • pp.203-205
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    • 2006
  • 대용량 인버터의 기본 구성요소인 밸브를 시험하는 방식에 대해 제안하였다. 대용량 인버터를 구성하기 위해서는 전력용 반도체 소자를 직렬로 연결하여 고전압을 스위칭할 수 있는 밸브가 필요하다. 이 밸브의 Snubber 회로의 적정성, 정격전압, 정격전류에서 정상적으로 스위칭이 이루어지는지 등의 검증이 필요하다. 본 본문에서는 전력용 반도체 소자에 이러한 시험조건을 제공하는 시험방식을 제안하였다.

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