대한전자공학회논문지SD (Journal of the Institute of Electronics Engineers of Korea SD)

대한전자공학회 (The Institute of Electronics and Information Engineers)
권호 표지

Signal Integrity 연결선 테스트용 다중천이 패턴 생성방안

An Effective Multiple Transition Pattern Generation Method for Signal Integrity Test on Interconnections

  • 김용준 (연세대학교 공과대학 전기전자공학과) ;
  • 양명훈 (연세대학교 공과대학 전기전자공학과) ;
  • 박영규 (연세대학교 공과대학 전기전자공학과) ;
  • 이대열 (연세대학교 공과대학 전기전자공학과) ;
  • 윤현준 (연세대학교 공과대학 전기전자공학과) ;
  • 강성호 (연세대학교 공과대학 전기전자공학과)
  • Kim, Yong-Joon (Department of Electrical and Electronic Engineering, Yonsei University) ;
  • Yang, Myung-Hoon (Department of Electrical and Electronic Engineering, Yonsei University) ;
  • Park, Young-Kyu (Department of Electrical and Electronic Engineering, Yonsei University) ;
  • Lee, Dae-Yeal (Department of Electrical and Electronic Engineering, Yonsei University) ;
  • Yoon, Hyun-Jun (Department of Electrical and Electronic Engineering, Yonsei University) ;
  • Kang, Sung-Ho (Department of Electrical and Electronic Engineering, Yonsei University)
  • 발행 : 2008.01.25
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초록

현대 반도체의 소형화 및 고성능화로 인해 반도체 테스팅 분야는 다양한 문제점에 봉착하고 있다. 이중 연결선에 대한 signal integrity 문제는 SoC와 같은 고집적 회로에서 반드시 해결해야할 문제이다. 본 논문에서는 연결선의 signal integrity 테스트를 위한 효과적인 테스트 패턴 적용 방안을 제안한다. 제안하는 테스트 패턴은 경계 주사 구조를 통해 적용 가능하며, 상당히 짧은 테스트 시간으로 매우 효과적인 테스트를 수행할 수 있다.

Semiconductor testing area challenges many testing issues due to the minimization and ultra high performance of current semiconductors. Among these issues, signal integrity test on interconnections must be solved for highly integrated circuits like SoC. In this paper, we propose an effective pattern application method for signal integrity test on interconnects. Proposed method can be applied by using boundary scan architecture and very efficient test can be preceded with pretty short test time.

키워드

참고문헌

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