• Title/Summary/Keyword: 건식 식각

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AG(Anti-glare)를 이용한 태양전지 특성 분석

  • Jeong, Sang-Hun;Jo, Yeong-U;Lee, Yun-Ho;Gong, Dae-Yeong;Seo, Chang-Taek;Jo, Chan-Seop;Lee, Jong-Hyeon
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.286-286
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    • 2010
  • 최근에 환경 오염과 화석 에너지의 고갈 문제를 해결하기 위하여 태양광을 전기 에너지로 변환하는 태양전지 연구에서 가장 이슈가 되는 부분은 저가격화와 고효율이다. 상용화 되어 있는 대부분의 태양전지는 단결정 실리콘 웨이퍼와 다결정 실리콘 웨이퍼를 사용한다. 실리콘 웨이퍼의 원자재 가격을 낮추는 방법에는 한계가 있기 때문에 태양전지 제작 공정에서 공정 단가를 낮추는 방법이 많이 연구되고 있고, 실리콘 웨이퍼가 가지는 재료의 특성상 화합물을 이용한 태양전지 보다 낮은 효율을 가질 수밖에 없기 때문에 반도체 소자 공정을 응용하여 실리콘 웨이퍼 기판에서 고효율을 얻는 방법으로 연구가 진행 되고 있다. 본 연구에서는 마이크로 블라스터를 이용하여 태양전지 cell 상부에 AG(anti-glare)를 가지는 유리 기판을 형성하여 낮은 단가로 태양전지 cell의 효율을 향상시키기 위한 연구를 진행 하였다. 태양전지 cell 상부에 AG를 가지는 유리 기판을 형성하게 되면 태양의 위도가 낮아 표면에서 대부분 반사되는 태양광을 태양전지 cell에서 광기전력효과가 일어나게 하여 효율을 향상시킨다. 이때 사용한 micro blaster 공정은 고속의 입자가 재료를 타격할 때 입자의 아래에는 고압축응력이 발생하게 되고, 이 고압 축응력에 의하여 소성변형과 탄성변형이 발생된다. 이러한 변형이 발전되어 재료의 파괴 초기값보다 크게 되면 크랙이 발생되고, 점점 더 발전하게 되면 재료의 제거가 일어나는 단계로 이루어지는 기계적 건식 식각 공정 기술이라 할 수 있다. 먼저 유리 기판에 마이크로 블라스터 장비를 이용하여 AG를 형성한다. AG는 $Al_2O_3$ 파우더의 입자 크기, 분사 압력, 노즐과 기판과의 간격, 반복 횟수, 노즐 이동 속도 등의 공정 조건에 따른 유리 기판 표면에서의 광학적 특성 및 구조적 특성에 관하여 분석하였다. 일반적인 태양전지 cell 제작 공정에 따라 cell을 제작 한후 AG 유리 기판을 상부에 형성시키고 솔라시뮬레이터를 이용하여 효율을 측정하였다. 이때 솔라시뮬레이터의 광원이 고정되어 있기 때문에 태양전지 cell에 기울기를 주어 태양의 위도 변화에 대해 간접적으로 측정하였다. AG 유리 기판이 태양전지 cell 상부에 형성 되었을 때와 없을 때를 각각 비교하여 AG 유리 기판이 형성된 태양전지 cell에서의 효율 향상을 확인하였다.

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The characteristic of InGaN/GaN MQW LED by different diameter in selective area growth method (선택성장영역 크기에 따른 InGaN/GaN 다중양자우물 청색 MOCVD-발광다이오드 소자의 특성)

  • Bae, Seon-Min;Jeon, Hun-Soo;Lee, Gang-Seok;Jung, Se-Gyo;Yoon, Wi-Il;Kim, Kyoung-Hwa;Yang, Min;Yi, Sam-Nyung;Ahn, Hyung-Soo;Kim, Suck-Whan;Yu, Young-Moon;Ha, Hong-Ju
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.22 no.1
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    • pp.5-10
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    • 2012
  • In general, the fabrications of the LEDs with mesa structure are performed grown by MOCVD method. In order to etch and separate each chips, the LEDs are passed the RIE and scribing processes. The RIE process using plasma dry etching occur some problems such as defects, dislocations and the formation of dangling bond in surface result in decline of device characteristic. The SAG method has attracted considerable interest for the growth of high quality GaN epi layer on the sapphire substrate. In this paper, the SAG method was introduced for simplification and fabrication of the high quality epi layer. And we report that the size of selective area do not affect the characteristics of original LED. The diameter of SAG circle patterns were choose as 2500, 1000, 350, and 200 ${\mu}m$. The SAG-LEDs were measured to obtain the device characteristics using by SEM, EL and I-V. The main emission peaks of 2500, 1000, 350, and 200 ${\mu}m$ were 485, 480, 450, and 445 nm respectively. The chips of 350, 200 ${\mu}m$ diameter were observed non-uniform surface and resistance was higher than original LED, however, the chips of 2500, 1000 ${\mu}m$ diameter had uniform surface and current-voltage characteristics were better than small sizes. Therefore, we suggest that the suitable diameter which do not affect the characteristic of original LED is more than 1000 ${\mu}m$.

Research on Fabrication of Silicon Lens for Optical Communication by Photolithography Process (포토리소그래피를 통한 광통신용 실리콘 렌즈 제작 및 특성 연구)

  • Park, Junseong;Lee, Daejang;Rho, Hokyun;Kim, Sunggeun;Heo, Jaeyeong;Ryu, Sangwan;Kang, Sung-Ju;Ha, Jun-Seok
    • Journal of the Microelectronics and Packaging Society
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    • v.25 no.2
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    • pp.35-39
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    • 2018
  • In order to improve the coupling efficiency, a collimator lens that collects the light emitted from the laser diode at a wide angle to the core of the optical fiber is essential. Glass mold method using a mold is widely used as a collimator lens currently used. Although this method is inexpensive to produce, it is difficult to form precisely and quality problems such as spherical aberration. In this study, the precision of surface processing was improved by replacing the existing glass mold method with the semiconductor process, and the material of the lens was changed to silicon suitable for the semiconductor process. The semiconductor process consists of a photolithography process using PR and a dry etching process using plasma. The optical coupling efficiency was measured using an ultra-precision alignment system for the evaluation of the optical characteristics of the silicon lens. As a result, the optical coupling efficiency was 50% when the lens diameter was $220{\mu}m$, and the optical coupling property was 5% or less with respect to the maximum optical coupling efficiency in the lens diameter range of $210-240{\mu}m$.

Capacitively Coupled SF6, SF6/O2, SF6/CH4 Plasma Etching of Acrylic at Low Vacuum Pressure (저진공 축전결합형 SF6, SF6/O2, SF6/CH4 플라즈마를 이용한 아크릴의 반응성 건식 식각)

  • Park, Yeon-Hyun;Joo, Young-Woo;Kim, Jae-Kwon;Noh, Ho-Seob;Lee, Je-Won
    • Korean Journal of Materials Research
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    • v.19 no.2
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    • pp.68-72
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    • 2009
  • This study investigated dry etching of acrylic in capacitively coupled $SF_6$, $SF_6/O_2$ and $SF_6/CH_4$ plasma under a low vacuum pressure. The process pressure was 100 mTorr and the total gas flow rate was fixed at 10 sccm. The process variables were the RIE chuck power and the plasma gas composition. The RIE chuck power varied in the range of $25{\sim}150\;W$. $SF_6/O_2$ plasma produced higher etch rates of acrylic than pure $SF_6$ and $O_2$ at a fixed total flow rate. 5 sccm $SF_6$/5 sccm $O_2$ provided $0.11{\mu}m$/min and $1.16{\mu}m$/min at 25W and 150W RIE of chuck power, respectively. The results were nearly 2.9 times higher compared to those at pure $SF_6$ plasma etching. Additionally, mixed plasma of $SF_6/CH_4$ reduced the etch rate of acrylic. 5 sccm $SF_6$/5 sccm $CH_4$ plasma resulted in $0.02{\mu}m$/min and $0.07{\mu}m$/min at 25W and 150W RIE of chuck power. The etch selectivity of acrylic to photoresist was higher in $SF_6/O_2$ plasma than in pure $SF_6$ or $SF_6/CH_4$ plasma. The maximum RMS roughness (7.6 nm) of an etched acrylic surface was found to be 50% $O_2$ in $SF_6/O_2$ plasma. Besides the process regime, the RMS roughness of acrylic was approximately $3{\sim}4\;nm$ at different percentages of $O_2$ with a chuck power of 100W RIE in $SF_6/O_2$ plasma etching.

Characteristics of Double-junction of High-$\textrm{T}_{c}$ Superconducting $\textrm{YBa}_{2}\textrm{Cu}_{3}\textrm{O}_{7-x}$ Step-edge Junctions (고온 초전도 $\textrm{YBa}_{2}\textrm{Cu}_{3}\textrm{O}_{7-x}$ 계단형 모서리 접합의 이중접합 특성)

  • Hwang, Jun-Sik;Seong, Geon-Yong;Gang, Gwang-Yong;Yun, Sun-Gil;Lee, Gwang-Ryeol
    • Korean Journal of Materials Research
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    • v.9 no.1
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    • pp.86-91
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    • 1999
  • We have fabricated high-$\textrm{T}_c$ superconducting $\textrm{YBa}_{2}\textrm{Cu}_{3}\textrm{O}_{7-x}$(YBCO) grain boundary junctions at a step-edge on (001) $\textrm{SrTiO}_3$(STO) substrates. A diamond-like carbon (DLC) film grown by plasma enhanced chemical vapor deposition were used as an ion milling mask to make steps on the STO (100) single crystal and was removed by an oxygen reactive ion etch process. The c-axis oriented YBCO and TO thin films were deposited epitaxially on the STO substrate with a step-edge by pulsed laser deposition. The grain boundary junctions were formed at the top and the bottom of the step. The junctions worked at temperatures above 77 K, and had I\ulcornerR\ulcorner products of 7.5mV at 16K and 0.3 mV at 77K, respectively. The I-V characteristics of these junctions showed the shape of the two noisy resistively shunted junction model.

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[O2/N2] Plasma Etching of Acrylic in a Multi-layers Electrode RIE System (다층 RIE Electrode를 이용한 아크릴의 O2/N2 플라즈마 건식 식각)

  • Kim, Jae-Kwon;Kim, Ju-Hyeong;Park, Yeon-Hyun;Joo, Young-Woo;Baek, In-Kyeu;Cho, Guan-Sik;Song, Han-Jung;Lee, Je-Won
    • Korean Journal of Materials Research
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    • v.17 no.12
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    • pp.642-647
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    • 2007
  • We investigated dry etching of acrylic (PMMA) in $O_2/N_2$ plasmas using a multi-layers electrode reactive ion etching (RIE) system. The multi-layers electrode RIE system had an electrode (or a chuck) consisted of 4 individual layers in a series. The diameter of the electrodes was 150 mm. The etch process parameters we studied were both applied RIE chuck power on the electrodes and % $O_2$ composition in the $N_2/O_2$ plasma mixtures. In details, the RIE chuck power was changed from 75 to 200 W.% $O_2$ in the plasmas was varied from 0 to 100% at the fixed total gas flow rates of 20 sccm. The etch results of acrylic in the multilayers electrode RIE system were characterized in terms of negatively induced dc bias on the electrode, etch rates and RMS surface roughness. Etch rate of acrylic was increased more than twice from about $0.2{\mu}m/min$ to over $0.4{\mu}m/min$ when RIE chuck power was changed from 75 to 200 W. 1 sigma uniformity of etch rate variation of acrylic on the 4 layers electrode was slightly increased from 2.3 to 3.2% when RIE chuck power was changed from 75 to 200 W at the fixed etch condition of 16 sccm $O_2/4\;sccm\;N_2$ gas flow and 100 mTorr chamber pressure. Surface morphology was also investigated using both a surface profilometry and scanning electron microscopy (SEM). The RMS roughness of etched acrylic surface was strongly affected by % $O_2$ composition in the $O_2/N_2$ plasmas. However, RIE chuck power changes hardly affected the roughness results in the range of 75-200 W. During etching experiment, Optical Emission Spectroscopy (OES) data was taken and we found both $N_2$ peak (354.27 nm) and $O_2$ peak (777.54 nm). The preliminarily overall results showed that the multi-layers electrode concept could be successfully utilized for high volume reactive ion etching of acrylic in the future.

Side-Wall 공정을 이용한 WNx Self-Align Gate MESFET의 제작 및 특성

  • 문재경;김해천;곽명현;임종원;이재진
    • Proceedings of the Korean Vacuum Society Conference
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    • 1999.07a
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    • pp.162-162
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    • 1999
  • 초고주파 집적회로의 핵심소자로 각광을 받고 있는 GaAs MESFET(MEtal-emiconductor)은 게이트 형성 공정이 가장 중요하며, WNx 내화금속을 이용한 planar 게이트 구조의 경우 임계전압(Vth:threshold voltage)의 균일도가 우수할 뿐만 아니라 특히 Side-wall을 이용한 self-align 게이트는 소오스 저항을 줄일 수 있어 고성능의 소자 제작을 가능하게 한다.(1) 본 연구의 핵심이 되는 Side-wall을 형성하기 위하여 PECVD법에 의한 SiOx 박막을 증착하고, 건식식각법을 이용하여 SiOx side-wall을 형성하였다. 이 공정을 이용하여 소오스 저항이 낮고 임계전압의 균일도가 우수한 고성능의 self-aligned gate MESFET을 제작하였다. 3inch GaAs 기판상에 이온주입법에 의한 채널 형성, d.c. 스퍼터링법에 의한 WNx 증착, PECVD법에 의한 SiOx 증착, MERIE(Magnetic Enhanced Reactive Ion Etcing)에 의한 Side-wall 형성, LDD(Lightly Doped Drain)와 N+ 이온주입, 그리고 RTA(Rapid Thermal Annealing)를 사용하여 활성화 공정을 수행하였다. 채널은 40keV, 4312/cm2로, LDD는 50keV, 8e12/cm2로 이온주입하였고, 4000A의 SiOx를 증착한 후 2500A의 Side-wall을 형성하였다. 옴익 접촉은 AuGe/Ni/Au 합금을 이용하였고, 소자의 최종 Passivation은 SiNx 박막을 이용하였다. 제작된 소자의 전기적 특성은 hp4145B parameter analyzer를 이용한 전압-전류 측정을 통하여 평가하였다. Side-wall 형성은 0.3$\mu\textrm{m}$ 이상의 패턴크기에서 수직으로 잘 형성되었고, 본 연궁에서는 게이트 길이가 0.5$\mu\textrm{m}$인 MESFET을 제작하였다. d.c. 특성 측정 결과 Vds=2.0V에서 임계전압은 -0.78V, 트랜스컨덕턴스는 354mS/mm, 그리고 포화전류는 171mA/mm로 평가되었다. 특히 본 연구에서 개발된 트랜지스터의 게이트 전압 변화에 따른 균일한 트랜스 컨덕턴스의 특성은 RF 소자로 사용할 때 마이크로 웨이브의 왜곡특성을 없애주기 때문에 균일한 신호의 전달을 가능하게 한다. 0.5$\mu\textrm{m}$$\times$100$\mu\textrm{m}$ 게이트 MESFET을 이용한 S-parameter 측정과 Curve fitting 으로부터 차단주파수 fT는 40GHz 이상으로 평가되었고, 특히 균일한 트랜스컨덕턴스의 경향과 함께 차단주파수 역시 게이트 바이어스, 즉 소오스-드레스인 전류의 변화에 따라 균일한 값을 보였다. 본 연구에서 개발된 Side-wall 공정은 게이트 길이가 0.3$\mu\textrm{m}$까지 작은 경우에도 사용가능하며, WNx self-align gate MEESFET은 낮은 소오스저항, 균일한 임계전압 특성, 그리고 높고 균일한 트랜스 컨덕턴스 특성으로 HHP(Hend-Held Phone) 및 PCS(Personal communication System)와 같은 이동 통신용 단말기의 MMICs(Monolithic Microwave Integrates Circuits)의 제작에 활용될 것으로 기대된다.

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Capacitively Coupled Dry Etching of GaAs in BCl3/N2 Discharges at Low Vacuum Pressure (저진공 축전 결합형 BCl3/N2 플라즈마를 이용한 GaAs의 건식 식각)

  • Kim, Jae-Kwon;Park, Ju-Hong;Lee, Sung-Hyun;Noh, Ho-Seob;Joo, Young-Woo;Park, Yeon-Hyun;Kim, Tae-Jin;Lee, Je-Won
    • Korean Journal of Materials Research
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    • v.19 no.3
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    • pp.132-136
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    • 2009
  • This study investigates GaAs dry etching in capacitively coupled $BCl_3/N_2$ plasma at a low vacuum pressure (>100 mTorr). The applied etch process parameters were a RIE chuck power ranging from $100{\sim}200W$ on the electrodes and a $N_2$ composition ranging from $0{\sim}100%$ in $BCl_3/N_2$ plasma mixtures. After the etch process, the etch rates, RMS roughness and etch selectivity of the GaAs over a photoresist was investigated. Surface profilometry and field emission-scanning electron microscopy were used to analyze the etch characteristics of the GaAs substrate. It was found that the highest etch rate of GaAs was $0.4{\mu}m/min$ at a 20 % $N_2$ composition in $BCl_3/N_2$ (i.e., 16 sccm $BCl_3/4$ sccm $N_2$). It was also noted that the etch rate of GaAs was $0.22{\mu}m/min$ at 20 sccm $BCl_3$ (100 % $BCl_3$). Therefore, there was a clear catalytic effect of $N_2$ during the $BCl_3/N_2$ plasma etching process. The RMS roughness of GaAs after etching was very low (${\sim}3nm$) when the percentage of $N_2$ was 20 %. However, the surface roughness became rougher with higher percentages of $N_2$.

Dry Etching of PMMA and Polycarbonate in a Diffusion Pump-based Capacitively Coupled O2 Plasma (확산펌프 기반의 O2 축전결합 플라즈마를 이용한 PMMA와 폴리카보네이트의 건식 식각)

  • Park, Ju-Hong;Lee, Seong-Hyun;Choi, Jyoung-Hoon;Noh, Ho-Sub;Lee, Je-Won
    • Korean Journal of Materials Research
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    • v.19 no.8
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    • pp.421-426
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    • 2009
  • We report on the capacitively coupled O2 plasma etching of PMMA and polycarbonate (PC) with a diffusion pump. Plasma process variables were process pressure and CCP power at 5 sccm $O_2$ gas flow rate. Characterization was done in order to analyze etch rate, etch selectivity, surface roughness, and morphology using stylus surface profilometry and scanning electron microscopy. Self bias decreased with increase of process pressure in the range of 25$\sim$180 mTorr. We found an important result for optimum pressure for the highest etch rate of PMMA and PC, which was 60 mTorr. PMMA and PC had etch rates of 0.46 and 0.28 ${\mu}m$/min under pressure conditions, respectively. More specifically, etch rates of the materials increased when the pressure changed from 25 mTorr to 60 mTorr. However, they reduced when the pressure increased further after 60 mTorr. RMS roughnesses of the etched surfaces were in the range of 2.2$\sim$2.9 nm. Etch selectivity of PMMA to a photoresist was $\sim$1.5:1 and that of PC was $\sim$0.9:1. Etch rate constant was about 0.04 ${\mu}m$/minW and 0.02 ${\mu}m$/minW for PMMA and PC, respectively, with the CCP power change at 5 sccm $O_2$ and 40 mTorr process pressure. PC had more erosion on the etched sidewall than PMMA did. The OES data showed that the intensity of the oxygen atomic peak (777.196 nm) proportionally increased with the CCP power.

Study of Low Reflectance and RF Frequency by Rie Surface Texture Process in Multi Crystall Silicon Solar Cells (공정가스와 RF 주파수에 따른 웨이퍼 표면 텍스쳐 처리 공정에서 저반사율에 관한 연구)

  • Yun, Myoung-Soo;Hyun, Deoc-Hwan;Jin, Beop-Jong;Choi, Jong-Young;Kim, Joung-Sik;Kang, Hyoung-Dong;Yi, Jun-Sin;Kwon, Gi-Chung
    • Journal of the Korean Vacuum Society
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    • v.19 no.2
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    • pp.114-120
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    • 2010
  • Conventional surface texturing in crystalline silicon solar cell have been use wet texturing by Alkali or Acid solution. But conventional wet texturing has the serious issue of wafer breakage by large consumption of wafer in wet solution and can not obtain the reflectance below 10% in multi crystalline silicon. Therefore it is focusing on RIE texturing, one method of dry etching. We developed large scale plasma RIE (Reactive Ion Etching) equipment which can accommodate 144 wafers (125 mm) in tray in order to provide surface texturing on the silicon wafer surface. Reflectance was controllable from 3% to 20% in crystalline silicon depending on the texture shape and height. We have achieved excellent reflectance below 4% on the weighted average (300~1,100 nm) in multi crystalline silicon using plasma texturing with gas mixture ratio such as $SF_6$, $Cl_2$, and $O_2$. The texture shape and height on the silicon wafer surface have an effect on gas chemistry, etching time, RF frequency, and so on. Excellent conversion efficiency of 16.1% is obtained in multi crystalline silicon by RIE process. In order to know the influence of RF frequency with 2 MHz and 13.56 MHz, texturing shape and conversion efficiency are compared and discussed mutually using RIE technology.