• Title/Summary/Keyword: (110) silicon

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고온 전자빔 증착에 의한 Ethylene Terephthalate상의 SiOx 박막의 특성 평가 (Characteristics of Defects in SiOx Thin films on Ethylene Terephthalate by High-temperature E-beam Deposition)

  • 한진우;김영환;김종환;서대식;문대규
    • 한국전기전자재료학회논문지
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    • 제19권1호
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    • pp.71-74
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    • 2006
  • In this paper, we investigated the characterization of silicon oxide(SiOx) thin film on Ethylene Terephthalate(PET) substrates by e-beam deposition for transparent barrier application. The temperature of chamber increases from $30^{\circ}C$ to $110^{\circ}C$, the roughness increase while the Water vapor transmission rate (WVTR) decreases. Under these conditions, the WVTR for PET can be reduced from a level of $0.57 g/m^2/day$ (bare subtrate) to $0.05 g/m^2/day$ after application of a 200-nm-thick $SiO_2$ coating at 110 C. A more efficient way to improve permeation of PET was carried out by using a double side coating of a 5-${\mu}m$-thick parylene film. It was found that the WVTR can be reduced to a level of $-0.2 g/m^2/day$. The double side parylene coating on PET could contribute to the lower stress of oxide film, which greatly improves the WVTR data. These results indicates that the $SiO_2$ /Parylene/PET barrier coatings have high potential for flexible organic light-emitting diode(OLED) applications.

Analytical Characterization of a Dual-Material Double-Gate Fully-Depleted SOI MOSFET with Pearson-IV type Doping Distribution

  • Kushwaha, Alok;Pandey, Manoj K.;Pandey, Sujata;Gupta, Anil K.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제7권2호
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    • pp.110-119
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    • 2007
  • A new two-dimensional analytical model for dual-material double-gate fully-depleted SOI MOSFET with Pearson-IV type Doping Distribution is presented. An investigation of electrical MOSFET parameters i.e. drain current, transconductance, channel resistance and device capacitance in DM DG FD SOI MOSFET is carried out with Pearson-IV type doping distribution as it is essential to establish proper profiles to get the optimum performance of the device. These parameters are categorically derived keeping view of potential at the center (${\phi}_c$) of the double gate SOI MOSFET as it is more sensitive than the potential at the surface (${\phi}_s$). The proposed structure is such that the work function of the gate material (both sides) near the source is higher than the one near the drain. This work demonstrates the benefits of high performance proposed structure over their single material gate counterparts. The results predicted by the model are compared with those obtained by 2D device simulator ATLAS to verify the accuracy of the proposed model.

집합조직과 이랑형표면결함의 제어 및 결정립 미세화 수단으로서의 비대칭압연 (Asymmetric Rolling as Means of Texture and Ridging Control and Grain Refinement)

  • 이동녕
    • 한국소성가공학회:학술대회논문집
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    • 한국소성가공학회 2004년도 제5회 압연심포지엄 신 시장 개척을 위한 압연기술
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    • pp.11-18
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    • 2004
  • Asymmetric rolling, in which the circumferential velocities of the upper and lower rolls are different, can give rise to intense plastic shear strains and in turn shear deformation textures through the sheet thickness. The ideal shear deformation texture of fcc metals can be approximated by the <111> // ND and $\{001\}<110>$ orientations, among which the former improves the deep drawability. The ideal shear deformation texture for bcc metals can be approximated by the Goss $\{110\}<001>\;and\;\{112\}<111>$ orientations, among which the former improves the magnetic permeability along the <100> directions and is the prime orientation in grain oriented silicon steels. The intense shear strains can result in the grain refinement and hence improve mechanical properties. Steel sheets, especially ferritic stainless steel sheets, and aluminum alloy sheets may exhibit an undesirable surface roughening known as ridging or roping, when elongated along RD and TD, respectively. The ridging or roping is caused by differently oriented colonies, which are resulted from the <100> oriented columnar structure in ingots or billets, especially for ferritic stainless steels, that is not easily destroyed by the conventional rolling. The breakdown of columnar structure and the grain refinement can be achieved by asymmetric rolling, resulting in a decrease in the ridging problem.

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Si/MgO 기판에 증착된 BaTiO$_3$ 박막의 구조 및 전기적 특성 (The Structural and electrical Properties of $BaTiO_3$ Thin Films Deposited on Si/MgO Substrates)

  • 홍경진;김태성
    • 한국전기전자재료학회논문지
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    • 제11권12호
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    • pp.1108-1114
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    • 1998
  • $BaTiO_3$ thin films preferred c-axis orientation for the potential application of ferroelectric memory devices were deposited on silicon substrates(100) by RF sputtering and annealed at 800 and 900[$^{\circ}C$] in air. The BT(100)/BT(110) peak ratio of the sputtered sample was decreased with post-annealing in air. According to increasing with annealing temperature and time, the peak ratio of BT(100)/BT(110) was decreased and the surface density of thin film was high. Dielectric characteristics of $BaTiO_3$ thin film was measured as a function of annealing temperature and frequency. The dielectric constants were increased with annealing and decreased with frequency by space charge polarization and dipole polarization below 600[kHz]. The remanent polarization and coercive field in P-E hysteresis loop of $BaTiO_3$thin film were increased with the annealing temperature in air. The remanent polarization and coercive filed annealed at 800[$^{\circ}C$] for 1hr were 1.2[$\mu$C/$cm^2$] and 200[kV/cm]

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Epoxy/Phenolic resin을 활용한 메타-아라미드 시트지와 금속 소재의 내열접착성 향상 (Improvement of Heat Resistant of Adhesion between m-Aramid Sheet and Metal Materials using Epoxy/Phenolic Resin)

  • 강찬규;채주원;최승진;이지수;김삼수;이상오;이재웅
    • 한국염색가공학회지
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    • 제34권3호
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    • pp.157-164
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    • 2022
  • This study tried to analyze the heat resistance properties by blending epoxy and phenolic resin in a certain ratio, and to analyze the adhesive properties at the time of metal-polymer hetero-adhesion by applying Epoxy-phenolic resin between a silicon steel sheet and m-aramid sheet, the viscosity, adhesive peel strength, and adhesive cross section were measured using a rotational rheometer, a tensile tester(UTM), and a field emission scanning electron microscopy(FE-SEM). The thermal stability and heat resistance were confirmed by measuring the mass loss according to the temperature increase using Thermogravimetric analysis(TGA). After blending with epoxy and Phenolic resin(1:0.25 ratio) curing at 110℃ for 10 min, high adhesive strength was improved more than 40% compared to the adhesive strength using epoxy alone. When the space between the silicon steel sheet and m-aramid sheet, which is created during curing of the E-P blend, is cured with a slight weight, it is possible to control the empty space and improve adhesion.

단결정 Si 기판의 결정 의존성 식각에 의한 Knife형 Si tip array의 제조 (Fabrication of Knife type Si tip array by orientation dependent etching of single silicon substrate)

  • 정유호;고창기;김철주;주병권;오명환
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1995년도 하계학술대회 논문집 C
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    • pp.1428-1430
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    • 1995
  • In this study we fabricate Knife type Si-tip array using (110) Si wafer. We can fabricate vertical structure by anisotropic etching using EPW and observe it by SEM. After the step, we perform isotropic etching and oxidation sharpening of the structure and also observe it by SEM, respectively. The purpose of isotropic etching is to reduce the oxidation time. We attain a optimal tip whose radius is about $100{\AA}$ after anisotropic etching 2.25 min.+isotropic etching 5 min.+oxidation 1 hour and 23 min.

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미세변위 측정을 위한 턴널링소자의 제조 (fabrication of the tunneling devices for the minimal displacement sensing)

  • 심대근;양영신;마대영
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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    • pp.107-110
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    • 2000
  • In this experiment, we fabricated pyramid-type silicon tunneling devices in which a tunneling current flow between a micro-tip and Si$_3$N$_4$ thin film membrane. A MEMS process was used for the fabrication of the tunneling devices. The micro-tips were formed on Si wafers by undercutting a differently oriented square of SiO$_2$ with KOH. The stiffness of the Si$_3$N$_4$ films were observed and the model for the stiffness calculation, which is useful in predicting the stiffness even when the stiffness ranges beyond the scope of the normal experimental condition, was suggested.

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Ion Beam Assisted Crystallization Behavior of Sol-Gel Derived $PbTiO_3$ Thin Films

  • Oh, Young-Jei;Oh, Tae-Sung;Jung, Hyung-Jin
    • The Korean Journal of Ceramics
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    • 제2권1호
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    • pp.48-53
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    • 1996
  • Ion beam assisted crystallization behavior of sol-gel derived $PbTiO_3$ thin films, deposited on bare silicon(100) substrates by spin-casting method, has been investigated. Ar ion bombardment was directly conducted on the spincoated film surface with or without heating the film from room temperature to $300^{\circ}C$. Ion dose was changed from $5{\times}10^{15}$ to $7.5{\times}10^{16}$ $Ar^-/cm^2$. Formation of (110) oriented perovskite phase was obseerved with ion dose above $5{\times}10^{16}\; Ar^+/cm^2$. Crystallization of $PbTiO_3$ thin film could be enhanced with increasing the Air ion dose, or heating the substrate during ion bombardment. Crystallization of the $PbTiO_3$ films by ion bombardment was related to the local heating effect during ion bombardment.

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Design and Analysis of GAIVAE System and Application to the Growth of Semiconductor Thin Films -On the Growth of GaAs on Si-

  • Kang, Ey-Goo;Sung, Man-Young;Park, Sung-Hee
    • Journal of Electrical Engineering and information Science
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    • 제3권1호
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    • pp.110-116
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    • 1998
  • A single-crystalline epitaxial film of GaAs has been grown on Si using a gs assisted-ionized vapour beam eptaxial technique. The native oxide layer on the silicon substrate was removed at 550$^{\circ}C$ by use of an accelerated arsenic ion beam, instead of a high-temperature desorption. During the growth the substrate temperature was maintained at 550$^{\circ}C$. Transmission electron microscopy and electron diffraction data suggest that the GaAs layer is an epitaxially grown single-crystalline layer. The possibility of growing device quality GaAs on Si is able demonstrated through fabrication of GaAs MODFET on Si substrates.

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이중 절연막 구조를 가전 플라스틱 유기 박막트랜지스터의 전기적 특성 (Electrical Characteristics of Organic Thin Film Transistors with Dual Layer Insulator on Plastic Substrates)

  • 최승진;이인규;박성규;김원근;문대규
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집
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    • pp.194-197
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    • 2002
  • Applying dual layer insulator on plastic substrates improved electrical characteristics of organic thin film transistor(TFT). A high-quality silicon dioxide(SiO$_2$) suitable for a insulator was deposited on plastic substrates by e-beam evaporation at 110$^{\circ}C$. The insulator film which was treated by N$_2$ annealing at 150$^{\circ}C$ showed excellent I-V, C-V characteristics. The dual layer insulator structure of polyimide-SiO$_2$ improved the roughness of SiO$_2$ surface and showed very low leakage current. In addition, the flat band voltage has been reduced from -2.5V to about 0.5V.

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