• E2M - 전기 전자와 첨단 소재
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• 제9권6호
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• pp.564-571
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• 1996

We calculated the drift-velocities of electrons and holes of I $n_{0.53}$(A $l_{x}$G $a_{1-x}$ )$_{0.47}$As, which is used for semiconductor materials of high performance HBTs, along with the various doping concentrations and Al mole fractions as well as the electric fields by Monte Carlo experiment. Especially, for the valence bands the accuracy of hole-drift-velocity was improved in the consideration of intervalley scattering due to the inelastic scattering of acoustic phonon. From the results the empirical formulas of the low- and high field mobility of electrons and holes were extracted by using nonlinear least square fitting method. The accuracy of the formulas was proved by comparing the formula of low-field electron mobility as well as drift-velocity of I $n_{0.53}$ G $a_{0.47}$As and of low-field hole mobility of GaAs with the measured values, where the error was below 10%. For the high-field mobilities of electron and hole the results calculated by the formulas were very well matched with the MC experimental results except at the narrow field range where the electrons produced the velocity overshoot and the corresponding error was about 30%.0%. 30%.0%.

• 대한전자공학회논문지SD
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• 제42권10호
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• pp.9-18
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• 2005

Si, GaAs, InP 및 $In_{0.53}Ga_{0.47}AS$ 계단형 $p^{+}n$ 접합에서의 항복전압을 위한 해석적 표현식을 유도하였다. 해석적 항복전압을 위해 각 물질에 대한 Marsland의 lucky drift 파라미터를 이용하여 유효이온화계수를 각각 추출하였고, 이의 이온화 적분을 통해 얻은 해석적 항복전압 결과는 $10^{14}cm\;^{-3}\~5\times10\;^{17}cm\;^{-3}$도핑 농도 범위에서 실험 결과와 $10\%$ 오차 범위 이내로 잘 일치하였다.

• 전자공학회논문지D
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• 제34D권7호
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• pp.56-61
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• 1997

I $n_{0.53}$G $a_{0.47}$As/I $n_{0.52}$A $l_{0.48}$As pseudomorphic high electron mobility transistor (P-HEMT) structures were grown on semi-insulating InP substrates by molecular beam epitzxy method. The hall effect measuremetn was used to measure the electrical properties and the photoluminescence (PL) measurement was used to measure the electrical properties and the photoluminescence(PL) measurement for optical propety. By the cross-sectional transmission electron microscopy (XTEM) investigation of the V and X shape defects including slip with angle of 60.deg. C and 120.deg. C to surface in the sampel, the defects formation mecahnism in the I $n_{0.52}$A $l_{0.48}$As epilayers on InP substrates could be explained with the different thermal expansion coefficients between I $n_{0.52}$A $l_{0.48}$As epilayers and InP substrate.d InP substrate.

• Transactions on Electrical and Electronic Materials
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• 제18권5호
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• pp.253-256
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• 2017

A thin Te interlayer was applied to a Ni/n-InGaAs contact to reduce the contact resistance between Ni-InGaAs and n-InGaAs. A 5-nm-thick Te layer was first deposited on a Si-doped n-type $In_{0.53}Ga_{0.47}As$ layer, followed by in situ deposition of a 30-nm-thick Ni film. After the formation of the Ni-InGaAs alloy by rapid thermal annealing at $300^{\circ}C$ for 30 s, the extracted specific contact resistivity (${\rho}_c$) reduced by more than one order of magnitude from $2.86{\times}10^{-4}{\Omega}{\cdot}cm^2$ to $8.98{\times}10^{-6}{\Omega}{\cdot}cm^2$ than that of the reference sample. A thinner Ni-InGaAs alloy layer with a better morphology was obtained by the introduction of the Te layer. The improved interface morphology and the graded Ni-InGaAs layer formed at the interface were believed to be responsible for ${\rho}_c$ reduction.

• Journal of Magnetics
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• 제14권1호
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• pp.23-26
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• 2009

Spin injection from a ferromagnet into an n-doped $In_{0.53}Ga_{0.47}As$ channel was electrically detected by a ferromagnetic detector. At T = 20 K, using non-local and local spin-valve measurements, a non-local signal of $2\;{\mu}V$ and a local spin valve signal of 0.041% were observed when the bias current was 1 mA. The band calculation and Shubnikov-de Haas oscillation measurement in a bulk channel showed that the gate controlled spin-orbit interaction was not large enough to control the spin precession but it could be a worthy candidate for a logic device using spin accumulation and diffusion.

• 한국진공학회지
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• 제11권4호
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• pp.207-211
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• 2002

반도체-유전체 덮개층의 다양한 조합이 I $n_{0.53}$G $a_{0.47}$As/InGaAsP(Q1.25) 양자우물 무질서화에 미치는 영향을 PL(Photoluminescence)을 이용하여 조사하였다. 청색 편이에 대한 문턱 온도는 약 $750^{\circ}C$ 였으며 전반적으로 온도가 올라감에 따라 청색 편이도 점차 증가하였으나 $SiO_2$의 경우에는 온도가 올라감에 따라 포화되는 경향을 보였다. $SiN_{x}$ 가 $SiO_2$보다 더 큰 청색 편이를 야기하였는데 이것은 $SiN_{x}$의 낮은 성장 온도와 관계가 있는 것으로 생각된다. $SiN_{x}$의 경우 P의 확산이, 그리고 $SiO_2$의 경우 Ga의 확산이 청색 편이에 중요한 역할을 하는 것으로 여겨진다.겨진다.

• 한국진공학회지
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• 제4권S1호
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• pp.168-173
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• 1995

$GaxIn{1_x}As$ epitaxial layers were grown by a simplified hydrode vapor phase epitaxy(VPE) method bsed on the utilization of Ga/In alloy as the source metal. The effects of a wide range of experimental variables(i.e.,inlet mole fraction of HCI, deposition temperature, Ga/In alloy composition) on the ternary composition and growth rate were investigated. Layers of $Ga_{0.47}In_{0.53}As$ lattice matched to InP were successfully grown from alloys containing 5 to 8 at.% Ga. These layers were used to produce state-of-the art p-i-n photodetectors having the following characteristics: dark current, $I_d$(-5V) = 10-20 nA: responsivity, R=0.84-0.86 A/W; dark current, Id(-5V)=10-20 nA; responsivity, R=0.84-0.86 A/W; capacitance, C=0.88-0.92 pF; breakdown voltage, $V_b$ >40V. This study demonstrated for the first time that a simplified hydride VPE process with a Ga/In alloy source is capable of producing device quality epitaxial layers.

• 한국전기전자재료학회논문지
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• 제13권5호
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• pp.365-370
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• 2000

Schottky contacts on n-In$\_$0.53//Ga$\_$0.47//As have been made by metal deposition on substrates cooled to a temperature of 77K. The current-voltage and capacitance-voltage characteristics showed that the Schottky diodes formed at low temperature had a much improved barrier height compared to those formed at room temperature. The Schottky barrier height ø$\_$B/ was found to be increased from 0.2eV to 0.6eV with Ag metal. The saturation current density of the low temperature diode was about 4 orders smaller than for the room temperature diode. A current transport mechanism dominated by thermionic emission over the barrier for the low temperature diode was found from current-voltage-temperature measurement. Deep level transient spectroscopy studies exhibited a bulk electron trap at E$\_$c/-0.23eV. The low temperature process appears to reduce metal induced surface damage and may form an MIS (metal-insulator-semiconductor)-like structure at the interface.

• 한국전기전자재료학회논문지
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• 제31권3호
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• pp.141-145
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• 2018

Ni-InGaAs shows promise as a self-aligned S/D (source/drain) alloy for n-InGaAs MOSFETs (metal-oxide-semiconductor field-effect transistors). However, limited thermal stability and instability of the microstructural morphology of Ni-InGaAs could limit the device performance. The in situ deposition of a Pd interlayer beneath the Ni layer was proposed as a strategy to improve the thermal stability of Ni-InGaAs. The Ni-InGaAs alloy layer prepared with the Pd interlayer showed better surface roughness and thermal stability after furnace annealing at $570^{\circ}C$ for 30 min, while the Ni-InGaAs without the Pd interlayer showed degradation above $500^{\circ}C$. The Pd/Ni/TiN structure offers a promising route to thermally immune Ni-InGaAs with applications in future n-InGaAs MOSFET technologies.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.751-754
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• 2003

Metamorphic HEMTs (MHEMTs) have emerged as excellent challenges for the design and fabrication of high-speed HEMTs for millimeter-wave applications. Some of improvements result from improved mobility and larger conduction band discontinuity in the channel, leading to more efficient modulation doping, better confinement, and better device performance compared with pseudomorphic HEMTs. We have studied the calibration on the DC and RF characteristics of the MHEMT device using I $n_{0.53}$G $a_{0.47}$As/I $n_{0.52}$A1$_{0.48}$As modulation-doped heterostructure on the GaAs wafer. For the optimized device performance simulation, we calibrated the device performance of 0.1-${\mu}{\textrm}{m}$ $\Gamma$-gate MHEMT fabricated in our research center using the 2D ISE-DESSIS device simulator. With this calibrated parameter set, we have obtained very good reproducibility. The device simulation on the DC and RF characteristics exhibits good reproducibility for our 0.1-${\mu}{\textrm}{m}$ -gate MHEMT device compared with the measurements. We expect that our calibration result can help design over-100-GHz MHEMT devices for better device performance.ormance.