• Electrical & Electronic Materials
• /
• v.9 no.6
• /
• pp.564-571
• /
• 1996

We calculated the drift-velocities of electrons and holes of I $n_{0.53}$(A $l_{x}$G $a_{1-x}$ )$_{0.47}$As, which is used for semiconductor materials of high performance HBTs, along with the various doping concentrations and Al mole fractions as well as the electric fields by Monte Carlo experiment. Especially, for the valence bands the accuracy of hole-drift-velocity was improved in the consideration of intervalley scattering due to the inelastic scattering of acoustic phonon. From the results the empirical formulas of the low- and high field mobility of electrons and holes were extracted by using nonlinear least square fitting method. The accuracy of the formulas was proved by comparing the formula of low-field electron mobility as well as drift-velocity of I $n_{0.53}$ G $a_{0.47}$As and of low-field hole mobility of GaAs with the measured values, where the error was below 10%. For the high-field mobilities of electron and hole the results calculated by the formulas were very well matched with the MC experimental results except at the narrow field range where the electrons produced the velocity overshoot and the corresponding error was about 30%.0%. 30%.0%.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.42 no.10 s.340
• /
• pp.9-18
• /
• 2005

Analytical expressions for breakdown voltages of abrupt $p^{+}n$ junction of Si, GaAs, InP and In$In_{0.53}Ga_{0.47}AS$ were induced. Getting analytical breakdown voltages, effective ionization coefficients were extracted using lucky drift parameters of Marsland for each materials. The results of analytical breakdown voltages followed by ionization integral agreed well with experimental result within 10$\%$ in error for the doping concentration in the range of $10^{14}cm\;^{-3}\~5\times10\;^{17}cm\;^{-3}$.

• Journal of the Korean Institute of Telematics and Electronics D
• /
• v.34D no.7
• /
• pp.56-61
• /
• 1997

I $n_{0.53}$G $a_{0.47}$As/I $n_{0.52}$A $l_{0.48}$As pseudomorphic high electron mobility transistor (P-HEMT) structures were grown on semi-insulating InP substrates by molecular beam epitzxy method. The hall effect measuremetn was used to measure the electrical properties and the photoluminescence (PL) measurement was used to measure the electrical properties and the photoluminescence(PL) measurement for optical propety. By the cross-sectional transmission electron microscopy (XTEM) investigation of the V and X shape defects including slip with angle of 60.deg. C and 120.deg. C to surface in the sampel, the defects formation mecahnism in the I $n_{0.52}$A $l_{0.48}$As epilayers on InP substrates could be explained with the different thermal expansion coefficients between I $n_{0.52}$A $l_{0.48}$As epilayers and InP substrate.d InP substrate.

• Transactions on Electrical and Electronic Materials
• /
• v.18 no.5
• /
• pp.253-256
• /
• 2017

A thin Te interlayer was applied to a Ni/n-InGaAs contact to reduce the contact resistance between Ni-InGaAs and n-InGaAs. A 5-nm-thick Te layer was first deposited on a Si-doped n-type $In_{0.53}Ga_{0.47}As$ layer, followed by in situ deposition of a 30-nm-thick Ni film. After the formation of the Ni-InGaAs alloy by rapid thermal annealing at $300^{\circ}C$ for 30 s, the extracted specific contact resistivity (${\rho}_c$) reduced by more than one order of magnitude from $2.86{\times}10^{-4}{\Omega}{\cdot}cm^2$ to $8.98{\times}10^{-6}{\Omega}{\cdot}cm^2$ than that of the reference sample. A thinner Ni-InGaAs alloy layer with a better morphology was obtained by the introduction of the Te layer. The improved interface morphology and the graded Ni-InGaAs layer formed at the interface were believed to be responsible for ${\rho}_c$ reduction.

• Journal of Magnetics
• /
• v.14 no.1
• /
• pp.23-26
• /
• 2009

Spin injection from a ferromagnet into an n-doped $In_{0.53}Ga_{0.47}As$ channel was electrically detected by a ferromagnetic detector. At T = 20 K, using non-local and local spin-valve measurements, a non-local signal of $2\;{\mu}V$ and a local spin valve signal of 0.041% were observed when the bias current was 1 mA. The band calculation and Shubnikov-de Haas oscillation measurement in a bulk channel showed that the gate controlled spin-orbit interaction was not large enough to control the spin precession but it could be a worthy candidate for a logic device using spin accumulation and diffusion.

• Journal of the Korean Vacuum Society
• /
• v.11 no.4
• /
• pp.207-211
• /
• 2002

Band gap tuning by quantum well disordering in $In_{0.53}Ga_{0.47}As/InGaAsP(Q1.25)$ quantum well structure has been investigated using photoluminescence. The threshold temperature for the blue shift was about $750^{\circ}C$ , and the blue shift became larger as the annealing temperature increased. $SiO_2$ showed saturation as the annealing temperature increased. $SiN_x$caused larger blue shift than $SiO_2$, which is considered to be related to the low growth temperature of $SiN_x$. The diffusion of P and Ga are thought to be responsible for the blue shift of the $SiN_x$ and $SiO_2$capped quantum well disordering , respectively.

• Journal of the Korean Vacuum Society
• /
• v.4 no.S1
• /
• pp.168-173
• /
• 1995

$GaxIn{1_x}As$ epitaxial layers were grown by a simplified hydrode vapor phase epitaxy(VPE) method bsed on the utilization of Ga/In alloy as the source metal. The effects of a wide range of experimental variables(i.e.,inlet mole fraction of HCI, deposition temperature, Ga/In alloy composition) on the ternary composition and growth rate were investigated. Layers of $Ga_{0.47}In_{0.53}As$ lattice matched to InP were successfully grown from alloys containing 5 to 8 at.% Ga. These layers were used to produce state-of-the art p-i-n photodetectors having the following characteristics: dark current, $I_d$(-5V) = 10-20 nA: responsivity, R=0.84-0.86 A/W; dark current, Id(-5V)=10-20 nA; responsivity, R=0.84-0.86 A/W; capacitance, C=0.88-0.92 pF; breakdown voltage, $V_b$ >40V. This study demonstrated for the first time that a simplified hydride VPE process with a Ga/In alloy source is capable of producing device quality epitaxial layers.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.13 no.5
• /
• pp.365-370
• /
• 2000

Schottky contacts on n-In$\_$0.53//Ga$\_$0.47//As have been made by metal deposition on substrates cooled to a temperature of 77K. The current-voltage and capacitance-voltage characteristics showed that the Schottky diodes formed at low temperature had a much improved barrier height compared to those formed at room temperature. The Schottky barrier height ø$\_$B/ was found to be increased from 0.2eV to 0.6eV with Ag metal. The saturation current density of the low temperature diode was about 4 orders smaller than for the room temperature diode. A current transport mechanism dominated by thermionic emission over the barrier for the low temperature diode was found from current-voltage-temperature measurement. Deep level transient spectroscopy studies exhibited a bulk electron trap at E$\_$c/-0.23eV. The low temperature process appears to reduce metal induced surface damage and may form an MIS (metal-insulator-semiconductor)-like structure at the interface.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.31 no.3
• /
• pp.141-145
• /
• 2018

Ni-InGaAs shows promise as a self-aligned S/D (source/drain) alloy for n-InGaAs MOSFETs (metal-oxide-semiconductor field-effect transistors). However, limited thermal stability and instability of the microstructural morphology of Ni-InGaAs could limit the device performance. The in situ deposition of a Pd interlayer beneath the Ni layer was proposed as a strategy to improve the thermal stability of Ni-InGaAs. The Ni-InGaAs alloy layer prepared with the Pd interlayer showed better surface roughness and thermal stability after furnace annealing at $570^{\circ}C$ for 30 min, while the Ni-InGaAs without the Pd interlayer showed degradation above $500^{\circ}C$. The Pd/Ni/TiN structure offers a promising route to thermally immune Ni-InGaAs with applications in future n-InGaAs MOSFET technologies.

• Proceedings of the IEEK Conference
• /
• 2003.07b
• /
• pp.751-754
• /
• 2003

Metamorphic HEMTs (MHEMTs) have emerged as excellent challenges for the design and fabrication of high-speed HEMTs for millimeter-wave applications. Some of improvements result from improved mobility and larger conduction band discontinuity in the channel, leading to more efficient modulation doping, better confinement, and better device performance compared with pseudomorphic HEMTs. We have studied the calibration on the DC and RF characteristics of the MHEMT device using I $n_{0.53}$G $a_{0.47}$As/I $n_{0.52}$A1$_{0.48}$As modulation-doped heterostructure on the GaAs wafer. For the optimized device performance simulation, we calibrated the device performance of 0.1-${\mu}{\textrm}{m}$ $\Gamma$-gate MHEMT fabricated in our research center using the 2D ISE-DESSIS device simulator. With this calibrated parameter set, we have obtained very good reproducibility. The device simulation on the DC and RF characteristics exhibits good reproducibility for our 0.1-${\mu}{\textrm}{m}$ -gate MHEMT device compared with the measurements. We expect that our calibration result can help design over-100-GHz MHEMT devices for better device performance.ormance.