• Title/Summary/Keyword: $SiO_2$ layer

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Electrical Characterization of $HfO_2$/Hf/Si(sub) Films Grown by Atomic Layer Deposition (ALD방법으로 성장된 $HfO_2$/Hf/Si 박막의 전기적 특성)

  • Lee, Dae-Gab;Do, Seung-Woo;Lee, Jae-Sung;Lee, Yong-Hyun
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.565-566
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    • 2006
  • In this work, We study electrical characterization of $HfO_2$/Hf/Si films grown by Atomic Layer Deposition(ALD). Through AES(Auger Electron Spectroscopy), capacitance-voltage(C-V) and current-voltage(I-V) analysis, the role of Hf layer for the better $HfO_2$/Si interface property was investigated. We found that Hf metal layer in our structure effectively suppressed the generation of interfacial $SiO_2$ layer between $HfO_2$ film and silicon substrate.

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Annealing Effects of Tunneling Dielectrics Stacked $SiO_2/Si_3N_4$ Layers for Non-volatile Memory (비휘발성 메모리를 위한 $SiO_2/Si_3N_4$ 적층 구조를 갖는 터널링 절연막의 열처리 효과)

  • Kim, Min-Soo;Jung, Myung-Ho;Kim, Kwan-Su;Park, Goon-Ho;Jung, Jong-Wan;Chung, Hong-Bay;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.128-129
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    • 2008
  • The annealing effects of $SiO_2/Si_3N_4$ stacked tunneling dielectrics were investigated. I-V characteristics of band gap engineered tunneling gate stacks consisted of $Si_3N_4/SiO_2/Si_3N_4$(NON), $SiO_2/Si_3N_4/SiO_2$(ONO) dielectrics were evaluated and compared with $SiO_2$ single layer using the MOS(Metal-Oxide-Semiconductor) capacitor structure. The leakage currents of engineered tunneling barriers (ONO, NON stacks) are lower than that of the conventional $SiO_2$ single layer at low electrical field. Meanwhile, the engineered tunneling barriers have larger tunneling current at high electrical field and improved electrical characteristics by annealing processes than $SiO_2$ layer.

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Fabrication of Sol-Gel derived Antireflective Thin Films of $SiO_2-ZrO_2$ System (솔-젤법에 의한 $SiO_2-ZrO_2$계 무반사 박막의 제조)

  • Kim, Byong-Ho;Hong, Kwon;Namkung, Jang
    • Journal of the Korean Ceramic Society
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    • v.32 no.5
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    • pp.617-625
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    • 1995
  • In order to reduce reflectance of soda-lime glass having average reflectance of 7.35% and refractive index of 1.53, single (SiO2), double (SiO2/20SiO2-80ZrO2), and triple (SiO2/ZrO2/75SiO2-25ZrO2) layers were designed and fabricated on the glass substrate by Sol-Gel method. Stble sols of SiO2-ZrO2 binary system for antireflective (AR) coatings were synthesized with tetraethyl orthosilicate (TEOS) and zirconium n-butoxide as precursors and ethylacetoacetate (EAcAc) as a chelating agent in an atmosphere environment. Films were deposited on soda-lime glass at the withdrawal rates of 3~11 cm/min using the prepared polymeric sols by dip-coating and they were heat-treated at 45$0^{\circ}C$ for 10 min to obtain homogeneous, amorphous and crack-free films. In case of SiO2-ZrO2 binary system, refractive index of film increased with an increase of ZrO2 mol%. Designed optical constant of films could be obtained through varying the withdrawal rate. In the visible region (380~780nm), reflectance was measured with UV/VIS/NIR Spectrophotometer. Average reflectances of the prepared single-layer [SiO2 (n=1.46, t=103nm)], double-layer [SiO2 (n=1.46, t=1-4nm)/20SiO2-80ZrO2 (n=1.81, t=82nm)], and triple-layer [SiO2 (n=1.46, t=104nm)/ZrO2 (n=1.90, t=80nm)/75SiO2-25ZrO2 (n=1.61, t=94 nm)] were 4.74%, 0.75% and 0.38%, respectively.

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Effect of Si on the High Temperature Oxidation of TiAl Alloys (Si 첨가가 TiAl 합금의 내산화성에 미치는 영향)

  • 김성훈;김승언;최송천;이동복
    • Journal of the Korean institute of surface engineering
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    • v.33 no.1
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    • pp.3-9
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    • 2000
  • Arc-melted alloys of TiAl-(o.25, 0.5, 1.0at%) Si were isothermally oxidized at 800, 900 and $1000^{\circ}C$ in air for 60hr. It was found that the oxidation resistance of the prepared TiAl-Si alloys was much better than that of pure TiAl, being progressively increasing with an increase in the Si content. This was attributed to the formation of $SiO_2$in addition to ($TiO_2$+$Al_2$$O_3$) oxides which formed in TiAl alloys with and without silicon additions. However, the silica formation within the oxide layer unfortunately accelerated the oxide scale spallations. During oxidation, all the elements in the base alloy diffused outward, whereas oxygen from the atmosphere diffused inward. The oxides were primarily composed of an outer thick $TiO_2$layer, an intermediate diffuse $Al_2$$O_3$layer and an inner $TiO_2$layer. A small amount of $SiO_2$was present all over the oxide scale and some voids were found around the intermediate layer.

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Effect of ALD-Al2O3 Passivation Layer on the Corrosion Properties of CrAlSiN Coatings (ALD-Al2O3 보호층이 적용된 CrAlSiN 코팅막의 내부식성 특성에 관한 연구)

  • Wan, Zhixin;Lee, Woo-Jae;Jang, Kyung Su;Choi, Hyun-Jin;Kwon, Se Hun
    • Journal of the Korean institute of surface engineering
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    • v.50 no.5
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    • pp.339-344
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    • 2017
  • Highly corrosion resistance performance of CrAlSiN coatings were obtained by applying ultrathin $Al_2O_3$ thin films using atomic layer deposition (ALD) method. CrAlSiN coatings were prepared on Cr adhesion layer/SUS304 substrates by a hybrid coating system of arc ion plating and high power impulse magnetron sputtering (HiPIMS) method. And, ultrathin $Al_2O_3$ passivation layer was deposited on the CrAlSiN/Cr adhesion layer/SUS304 sample to protect CrAlSiN coatings by encapsulating the whole surface defects of coating using ALD. Here, the high-angle annular dark-field scanning transmission electron microscopy (HAADF-STEM) and energy dispersive X-ray spectrometry (EDX) analysis revealed that the ALD $Al_2O_3$ thin films uniformly covered the inner and outer surface of CrAlSiN coatings. Also, the potentiodynamic and potentiostatic polarization test revealed that the corrosion protection properties of CrAlSiN coatings/Cr/SUS304 sample was greatly improved by ALD encapsulation with 50 nm-thick $Al_2O_3$ thin films, which implies that ALD-$Al_2O_3$ passivation layer can be used as an effect barrier layer of corrosion.

A Study on Adhesion and Electro-optical Properties of ITO Films deposited on Flexible PET Substrates with $SiO_2$ Buffer Layer (PET 기판 위해 $SiO_2$ 버퍼층 도입에 따른 IT 박막의 접착 및 전기적.광학적 특성 연구)

  • Kang, Ja-Youn;Kim, Dong-Won;Yun, Hwan-Jun;Park, Kwang-Hee
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.316-316
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    • 2008
  • Using an evaporation method, $SiO_2$ was deposited as a buffer layer between a flexible PET substrate and a ITO film deposited by DC magnetron sputtering and electro-optical properties were investigated with thickness variance of $SiO_2$ layers. After coating a $SiO_2$ layer and a ITO film, the ITO/$SiO_2$/PET was heated up to $200^{\circ}C$ and the resistivity and the transmittance were measured by hall effect measurement system and UV/VIS/NIR spectroscopy. As a result of depositing a $SiO_2$ buffer layer, the resistivity increased and the transmittance and adhesion property were enhanced than ITO films with no buffer layers and the resistivity was lowered as $SiO_2$ thickness increased from 50 $\AA$ to 100 $\AA$. It was found that the transmittance was independent of annealing temperature variance in $150^{\circ}C{\sim}200^{\circ}C$ and the resistivity decreased as the temperature increased and especially decreasing rate of the resistivity was higher as the buffer layer thickness was thinner. So under optimized depositing of $SiO_2$ buffer layers and post-annealing of ITO/$SiO_2$/PET, ITO films with enhanced adhesion, electro-optical properties can obtained.

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Effect of a SiO2 Anti-reflection Layer on the Optoelectronic Properties of Germanium Metal-semiconductor-metal Photodetectors

  • Zumuukhorol, Munkhsaikhan;Khurelbaatar, Zagarzusem;Kim, Jong-Hee;Shim, Kyu-Hwan;Lee, Sung-Nam;Leem, See-Jong;Choi, Chel-Jong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.4
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    • pp.483-491
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    • 2017
  • The interdigitated germanium (Ge) meta-lsemiconductor-metal (MSM) photodetectors (PDs) with and without an $SiO_2$ anti-reflection (AR) layer was fabricated, and the effect of $SiO_2$ AR layer on their optoelectronic response properties were investigated in detail. The lowest reflectance of 15.6% at the wavelength of 1550 nm was obtained with a $SiO_2$ AR layer with a thickness of 260 nm, which was in a good agreement with theoretically calculated film thickness for minimizing the reflection of Ge surface. The Ge MSM PD with 260 nm-thick $SiO_2$ AR layer exhibited enhanced device performance with the maximum values of responsivity of 0.65 A/W, the quantum efficiency of 52.2%, and the detectivity of $2.49{\times}10^9cm\;Hz^{0.5}W^{-1}$ under the light illumination with a wavelength of 1550 nm. Moreover, time-dependent switching analysis of Ge MSM PD with 260 nm- thick $SiO_2$ AR layer showed highest on/off ratio with excellent stability and reproducibility. All this investigation implies that 260 nm-thick $SiO_2$ AR layer, which is effective in the reduction in the reflection of Ge surface, has a great potential for Ge based optoelectronic devices.

Improvement of Permeation of Solvent-free Multi-layer Encapsulation of Thin Films on Polyethylene Terephthalate (PET) (고분자 기판위에 유기 용매를 사용하지 않은 다층 박막 Encapsulation 기술 개발)

  • Han Jin-Woo;Kang Hee-Jin;Kim Jong-Yeon;Seo Dae-Shik
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.8
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    • pp.754-757
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    • 2006
  • The inorganic multi-layer thin film encapsulation was newly adopted to protect the organic layer from moisture and oxygen. Using the electron beam, sputter, inorganic multi-layer thin-film encapsulation was deposited onto the Polyethylene Terephthalate (PET) and their interface properties between inorganic and organic layer were investigated. In this investigation, the SiON, $SiO_2$ and parylene layer showed the most suitable properties. Under these conditions, the WVTR for PET can be reduced from level of $0.57g/m^2/day$ (bare subtrate) to $1*10^{-5}g/m^2/day$ after application of a SiON and $SiO_2$ layer. These results indicates that the $PET/SiO_2/SiON/Parylene$ barrier coatings have high potential for flexible organic light-emitting diode(OLED) applications.

Characteristics of Gate Electrode for WSi2/CVD-Si/SiO2 (WSi2/CVD-Si/SiO2 구조의 게이트 전극 특성)

  • 박진성;정동진;이우성;이예승;문환구;김영남;손민영;이현규;강성철
    • Journal of the Korean Ceramic Society
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    • v.30 no.1
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    • pp.55-61
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    • 1993
  • In the WSi2/CVD-Si/SiO2 polycide structure, electrode resistance and its property were studied as a function of deposition temperature and thickness of CVD-Si, diffusion condition of POCl3, and WSi2 being deposited or not. Resistivity of poly-Si is decreased with increment of thickness in the case of POCl3 diffusion of low sheet resistance, but it is increased in the case of high sheet resistance. The resistivity of amorphous-Si is generally lower than that of poly-Si. Initial sheet resistance of poly-Si/WSi2 gate electrode is affected by the thickness and resistance of poly-Si layer, but final resistance after anneal, 900$^{\circ}C$/30min/N2, is only determined by WSi2 layer. Flourine diffuses into SiO2, but tungsten does not. In spite of out-diffusion of phosphorus into WSi2 layer, the sheet resistance is not changed.

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