• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.48-48
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• 2009

최근 빠른 동작속도와 고 집적도를 얻기 위해 metal oxide semiconductor field effect transistor (MOSFET) 의 크기는 계속 해서 줄어들고 있다. 동시에 게이트의 절연층도 얇아지게 된다. 절연층으로 사용되는 $SiO_2$ 의 두께가 2nm 이하로 얇아 지게 되면 터널링에 의해 누설 전류가 발생하게 된다. 이 문제를 해결하기 위해 $SiO_2$ 를 대체할 고유전체 물질의 연구가 활발하다. 고유전체 물질 중에는 $ZrO_2,\;Al_2O_3,\;HfO_2$ 등이 많이 연구 되어 왔다. 하지만 유전상수 이외에 band gap energy, thermodynamic stability, recrystallization temperature 등의 특성이 좋지 않아 대체 물질로 문제점이 있다. 이를 보안하기 위해 산화물을 합금과 결합시키면 서로의 장점들이 합쳐져 기준들을 만족하는 물질을 만들 수 있고 $HfAlO_3$가 그 중 하나이다. Al를 첨가하는 이유는 문턱전압을 낮추기 위해서다. $HfAlO_3$는 유전상수 18.2, band gap energy 6.5 eV, recrystallization temperature 800 $^{\circ}C$이고 열역학적 특성이 안정적이다. 게이트 절연층은 전극과 기판사이에 적층구조를 이루고 있어 이방성인 드라이 에칭이 필요하고 공정 중 마스크물질과의 선택비가 높아야한다. 본 연구는 $HfAlO_3$박막을 $BCl_3/Ar,\;N_2/BCl_3/Ar$ 유도결합 플라즈마를 이용해 식각했다. 베이스 조건은 RF Power 500 W, DC-bias -100 V, 공정압력 15 mTorr, 기판온도 40 $^{\circ}C$ 이다. 가스비율, RF Power, DC-bias, 공정 압력에 의한 마스크물질과 의 선택비를 알아보았다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권5호
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• pp.543-548
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• 2014

In this paper, the dielectric relaxation and reliability of high capacitance density metal-insulator-metal (MIM) capacitors using $Al_2O_3-HfO_2-Al_2O_3$ and $SiO_2-HfO_2-SiO_2$ sandwiched structure under constant voltage stress (CVS) are characterized. These results indicate that although the multilayer MIM capacitor provides high capacitance density and low dissipation factor at room temperature, it induces greater dielectric relaxation level (in ppm). It is also shown that dielectric relaxation increases and leakage current decreases as functions of stress time under CVS, because of the charge trapping effect in the high-k dielectric.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권2호
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• pp.120-126
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• 2005

We have proposed a characteristic method to estimate real composition when multi component oxide films are deposited by ALD. Final atomic concentration ratio was theoretically calculated from the film densities and growth rates for $HfO_2$ and $Al_2O_3$ using ALD processed HfxAhOz mms.W e have transformed initial source feeding ratio during deposition to fins] atomic ratio in $Hf_xAl_yO_z$ films through thickness factors ($R_{HFO_2}$ ami $R_{Al_2O_3}$) ami concentration factor(C) defined in our experiments. Initial source feeding ratio could be transformed into the thickness ratio by each thickness factor. Final atomic ratio was calculated from thickness ratio by concentration factor. It has been successfully confirmed that the predicted atomic ratio was in good agreement with the actual measured value by ICP-MS analysis.

• 한국전기전자재료학회논문지
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• 제36권2호
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• pp.125-128
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• 2023

Recently, as the process of the MOS device becomes more detailed, and the degree of integration thereof increases, many problems such as leakage current due to an increase in electron tunneling due to the thickness of SiO₂ used as a gate oxide have occurred. In order to overcome the limitation of SiO₂, many studies have been conducted on HfO₂ that has a thermodynamic stability with silicon during processing, has a higher dielectric constant than SiO₂, and has an appropriate band gap. In this study, HfO₂, which is attracting attention in various fields, was doped with Al and the change in properties according to its concentration was studied. Al-doped HfO₂ thin film was deposited using Plasma Enhanced Atomic Layer Deposition (PEALD), and the structural and electrical characteristics of the fabricated MIM device were evaluated. The results of this study are expected to make an essential cornerstone in the future field of next-generation semiconductor device materials.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.448-448
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• 2012

최근에 pH 감지막의 감지감도특성을 평가하기 위해 electrolyte insulator semiconductor (EIS) 구조가 유용하게 이용되고 있다. EIS는 간단한 구조와 pH 용액에 빠른 응답속도, 낮은 단가 및 집적이 용이하다는 장점이 있다. EIS 구조에서 화학적 용액에 대한 감지감도 평가 중 가장 중요하게 작용하는 부분이 감지막이다. 이 감지막은 감지 대상 물질과 물리적으로 직접 접촉되는 부분으로서 일반적으로 기계적/화학적 강도가 우수한 실리콘 산화막($SiO_2$)이 많이 사용되어져 왔다. 최근에는 기존의 $SiO_2$ 보다 성능이 향상된 감지막을 개발하기 위하여 $Al_2O_3$, $HfO_2$, $ZrO_2$, 그리고 $Ta_2O_5$와 같은 고유전 상수(high-k)를 가지는 물질들을 EIS 센서의 감지막으로 이용하는 연구가 활발하게 진행되고 있다. High-k 물질 중 $Al_2O_3$는 산성에서 알칼리성 영역까지의 넓은 화학안정성을 가지며 화학용액에 대해 내구성이 우수한 특성을 가진다. $HfO_2$은 내식성이 뛰어나며 출력특성이 높은 장점을 가진 물질이다. 본 실험에서는 특성이 다른 두 물질을 EIS의 감지막으로 각각 사용하여 두께에 따른 의존성을 평가하였다. 제작한 EIS 구조의 pH 센서를 바이오 센서에 적용하였을 때 신호대 잡음비(SNR: signal to noise)가 여전히 취약하다는 문제점이 있었다. 이런 문제점을 보완하기 위하여 감지막의 물리적 두께는 점점 얇아지게 되었고 그 결과 높은 출력 특성을 얻게 되었지만, 감지막이 얇아짐에 따라서 화학 용액 중의 이온 침투로 인한 감지막 자체의 손상 또한 심각한 문제로 대두되었다. 이로 인해 최적화 된 감지막의 두께를 얻을 필요가 있다. 결론적으로 $Al_2O_3$, $HfO_2$ 두 감지막 모두 두께가 23 nm일 때 가장 우수한 특성을 보였으며, $Al_2O_3$를 감지막으로 사용하였을 경우 화학적 용액에 대해 내구성이 뛰어났고, $HfO_2$을 사용하였을 때에는 화학적 용액에 대한 안정성 보다는 pH 용액변화에 따른 향상된 감지감도특성을 보였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.34-34
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• 2009

The electrical characteristics of tunnel barrier engineered charge trap flash (TBE-CTF) memory with $SiO_2/Si_3N_4/SiO_2/Si$ engineered tunnel barrier, $HfO_2$ charge trap layer and $Al_2O_3$ blocking oxide layer (MAHONOS) were investigated. The energy bad diagram was designed by using the quantum-mechanical tunnel model (QM) and then the CTF memory devices were fabricated. As a result, the best thickness combination of MAHONOS is confirmed. Moreover, not enhanced P/E speed (Program: about $10^6$ times) (Erase: about $10^4$ times) but also enhanced retention and endurance characteristics are represented.

• 한국전기전자재료학회논문지
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• 제36권3호
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• pp.226-232
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• 2023

As a potential alternative to flash memory, HfO₂/Al₂O₃ stacks appear to be a viable option as charge capture layers in charge trapping memories. The paper undertakes a review of HfO₂/Al₂O₃ stacks as charge trapping layers, with a focus on comparing the number, thickness, and post-deposition heat treatment and γ-ray and white x-ray treatment of such stacks. Compared to a single HfO₂ layer, the memory window of the 5-layered stack increased by 152.4% after O₂ annealing at ±12 V. The memory window enlarged with the increase in number of layers in the stack and the increase in the Al/Hf content in the stack. Furthermore, our comparison of the treatment of HfO₂/Al₂O₃ stacks with varying annealing temperatures revealed that an increased annealing temperature resulted in a wider storage window. The samples treated with O₂ and subjected to various γ radiation intensities displayed superior resistance. and the memory window increased to 12.6 V at ±16 V for 100 kGy radiation intensity compared to the untreated samples. It has also been established that increasing doses of white x-rays induced a greater number of deep defects. The optimization of stacking layers along with post-deposition treatment condition can play significant role in extending the memory window.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.477-477
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• 2008

For more than three decades, the gate dielectrics in CMOS devices are $SiO_2$ because of its blocking properties of current in insulated gate FET channels. As the dimensions of feature size have been scaled down (width and the thickness is reduced down to 50 urn and 2 urn or less), gate leakage current is increased and reliability of $SiO_2$ is reduced. Many metal oxides such as $TiO_2$, $Ta_2O_4$, $SrTiO_3$, $Al_2O_3$, $HfO_2$ and $ZrO_2$ have been challenged for memory devices. These materials posses relatively high dielectric constant, but $HfO_2$ and $Al_2O_3$ did not provide sufficient advantages over $SiO_2$ or $Si_3N_4$ because of reaction with Si substrate. Recently, $HfO_2$ have been attracted attention because Hf forms the most stable oxide with the highest heat of formation. In addition, Hf can reduce the native oxide layer by creating $HfO_2$. However, new gate oxide candidates must satisfy a standard CMOS process. In order to fabricate high density memories with small feature size, the plasma etch process should be developed by well understanding and optimizing plasma behaviors. Therefore, it is necessary that the etch behavior of $HfO_2$ and plasma parameters are systematically investigated as functions of process parameters including gas mixing ratio, rf power, pressure and temperature to determine the mechanism of plasma induced damage. However, there is few studies on the the etch mechanism and the surface reactions in $BCl_3$ based plasma to etch $HfO_2$ thin films. In this work, the samples of $HfO_2$ were prepared on Si wafer with using atomic layer deposition. In our previous work, the maximum etch rate of $BCl_3$/Ar were obtained 20% $BCl_3$/ 80% Ar. Over 20% $BCl_3$ addition, the etch rate of $HfO_2$ decreased. The etching rate of $HfO_2$ and selectivity of $HfO_2$ to Si were investigated with using in inductively coupled plasma etching system (ICP) and $BCl_3/Cl_2$/Ar plasma. The change of volume densities of radical and atoms were monitored with using optical emission spectroscopy analysis (OES). The variations of components of etched surfaces for $HfO_2$ was investigated with using x-ray photo electron spectroscopy (XPS). In order to investigate the accumulation of etch by products during etch process, the exposed surface of $HfO_2$ in $BCl_3/Cl_2$/Ar plasma was compared with surface of as-doped $HfO_2$ and all the surfaces of samples were examined with field emission scanning electron microscopy and atomic force microscope (AFM).

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.344-344
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• 2010

A capacitor with engineered tunnel barrier composed of High-k materials has been fabricated. Variable oxide thickness (VARIOT) barrier consisting of thin SiO2/HfO2/Al2O3 (2/1/3 nm) dielectric layers were used as engineered tunneling barrier. We studied the electrical characteristics of multi stacked tunnel layers for various RTA (Rapid Thermal Anneal) and FGA (Forming Gas Anneal) temperature.

• 한국세라믹학회:학술대회논문집
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• 한국세라믹학회 2003년도 추계총회 및 연구발표회 초록집
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• pp.34.2-34.2
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• 2003