• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.310.1-310.1
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• 2013

We show the novel hot electron based-solar energy conversion using tandem structured Schottky diode with double Schottky barriers. In this report, we show the effect of the double Schottky barriers on solar cell performance by enhancing both of internal photoemission and band-to-band excitation. The tandem structured Au/Si diode capped with TiO2 layer as second semiconductor exhibited improved ability for light harvesting. The proposed mechanisms consist of multiple reflections of hot electrons and additional pathway of solar energy conversion due to presence of multiple interfaces between thin gold film and semiconductors. Short-circuit photocurrent measured on the tandem structured Au/Si diodes under illumination of AM1.5 increased by approximately 70% from 3.1% to 5.3% and overall incident photon to electron conversion efficiency (IPCE) was enhanced in visible light, revealing that the concept of the double Schottky barriers have significant potential as novel strategy for light harvesting.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.407-407
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• 2008

무기EL 디스플레이는 고체재료에 전계를 가했을 때 발광하는 현상을 이용한소자로서, 급속도로 발전을 거듭하고 있으나, 유전체층에 강한전계를 가하여 발광하여야 하므로 낮은 Breakdown voltage와 효율의 한계로 인하여 휘도가 낮고 풀 컬러화 디스플레이 등 의 응용에는 적용되고 있지 못하는 실정이다. 본 연구에서는 강유전체 Perovskite 구조를 가지는 ABO3 물질 중 PMN(Lead Magnesium niobate) 과 PZT (Lead Zirconate titanate) 후막을 제조하여 Inorganic EL(Electro Luminance)에 적용하고 소자의 광전특성을 평가하였다. 소자에 사용된 기판은 고온소성에 알맞은 알루미나(Al2O3)기판을 채택 하였으며, 그 위 하부전극으로는 고온소성에 따른 화학적 안정성이 우수한 Au전극을 Screen Printing 하였다. 제조 되어진 PMN후막 페이스트는 PMN(Pb(Mg1/2 Nb2/3)O3) + Glass Frit(Pb-Zn-B) + BaTiO3(99.99%) 로 합성되었으며 하부전극위에 인쇄하였다. 그 다음 PZT sol-gel을 Spin coating으로 도포 하였다. 형광체로 ZnS:Cu.Cl 을 Screen Printing을로 형성하였으며, 평탄화를 위하여 유기물 충을 Screen Printing 공정으로 성막 하였다. 상부전극으로는 DC sputter로 ITO를 증착하여 EL소자 완성 후 Spectro - Chroma meter로 소자특성을 측정하였다. 평탄화를 통한 유기물층에 변화되는 Capacitance를 Oscilloscope로 전압 전류 pulse의 변화에 따른 opto-electronic 특성을 평가하였다.

• Korean Journal of Metals and Materials
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• v.48 no.7
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• pp.667-673
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• 2010

Copper filling into TSV (through-silicon-via) and reduction of the filling time for the three dimensional chip stacking were investigated in this study. A Si wafer with straight vias - $30\;{\mu}m$ in diameter and $60\;{\mu}m$ in depth with $200\;{\mu}m$ pitch - where the vias were drilled by DRIE (Deep Reactive Ion Etching) process, was prepared as a substrate. $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. In order to reduce the time required complete the Cu filling into the TSV, the PPR (periodic pulse reverse) wave current was applied to the cathode of a Si chip during electroplating, and the PR (pulse-reverse) wave current was also applied for a comparison. The experimental results showed 100% filling rate into the TSV in one hour was achieved by the PPR electroplating process. At the interface between the Cu filling and Ti/ Au functional layers, no defect, such as a void, was found. Meanwhile, the electroplating by the PR current showed maximum 43% filling ratio into the TSV in an hour. The applied PPR wave form was confirmed to be effective to fill the TSV in a short time.

• Korean Journal of Optics and Photonics
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• v.14 no.5
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• pp.545-554
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• 2003

Design of the optical modulator composed of a three-waveguide coupler and CPW traveling-wave electrodes was carried out. Switching phenomena of three-waveguide couplers were analyzed by using the coupled mode theory, and the coupling-lengths of the devices were calculated by means of the FDM. CPW traveling-wave electrodes were analysed by the CMM and SOR simulation technique in order to find the conditions of phase-velocity and impedance matching. Traveling-wave modulators were fabricated on z-cut LiNbO$_3$ substrate. Ti was in-diffused in LiNbO$_3$ to make waveguides and Au electrodes were built on the waveguides by the electrolyte technique. The fabricated modulator chip was end-polished, pig-tailed and packaged in a brass mount with K-connector. The insertion loss and the switching voltage of the optical modulator were about 4㏈ and 19V, respectively. Network analyzer was used to obtain the S parameter and the corresponding RF response. From the measurement, parameters of the traveling-wave electrodes were extracted to be Z$_{c}$= 45 Ω, N$_{eff}$=2.20, and $\alpha$$_{0}$=0.055/cm√GHZ. The measured optical response R($\omega$) was compared with the theoretically estimated one, showing both responses agree well. The measurement results revealed that 3㏈ bandwidth turned out to be about 13 GHz.

• Transactions on Electrical and Electronic Materials
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• v.18 no.3
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• pp.141-143
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• 2017

Novel structured thin film transistors (TFTs) of amorphous silicon zinc tin oxide (a-SZTO) were designed and fabricated with a thin metal layer between the source and drain electrodes. A SZTO channel was annealed at $500^{\circ}C$. A Ti/Au electrode was used on the SZTO channel. Metals are deposited between the source and drain in this novel structured TFTs. The mobility of the was improved from $14.77cm^2/Vs$ to $35.59cm^2/Vs$ simply by adopting the novel structure without changing any other processing parameters, such as annealing condition, sputtering power or processing pressure. In addition, stability was improved under the positive bias thermal stress and negative bias thermal stress applied to the novel structured TFTs. Finally, this novel structured TFT was observed to be less affected by back-channel effect.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.371.2-371.2
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• 2016

Graphene electronics is one of the promising technologies for the next generation electronic devices due to the outstanding properties such as conductivity, high carrier mobility, mechanical, and optical properties along with extended applications using 2 dimensional heterostructures. However, large contact resistance between metal and graphene is one of the major obstacles for commercial application of graphene electronics. In order to achieve low contact resistance, numerous researches have been conducted such as gentle plasma treatment, ultraviolet ozone (UVO) treatment, annealing treatment, and one-dimensional graphene edge contact. In this report, we suggest a fabrication method of one-dimensional graphene metal edge contact without using graphene exfoliation. Graphene is grown on Cu foil by low pressure chemical vapor deposition. Then, the graphene is transferred on $SiO_2/Si$ wafer. The patterning of graphene channel and metal electrode is done by photolithography. $O_2$ plasma is applied to etch out the exposed graphene and then Ti/Au is deposited. As a result, the one-dimensional edge contact geometry is built between metal and graphene. The contact resistance of the fabricated one-dimensional metal-graphene edge contact is compared with the contact resistance of vertically stacked conventional metal-graphene contact.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.300.2-300.2
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• 2014

테라헤르쯔(terahertz : THz)파는 0.1~10 THz 의 범위로 적외선과 방송파 사이에 광대역 주파수 스펙트럼을 차지하고 있으며 직진성, 투과성, 그리고 낮은 에너지(meV)를 가지고 있어 비 파괴적이고 무해한 장점을 지니고 있다. Ti:sapphire laser와 같은 femto-pulse source 등이 많은 발전이 되어 현재 많은 연구와 발전이 이루어지고 있다. femto-pulse source를 이용한 THz 응용에서는 높은 저항, 큰 전자이동도, 그리고 아주 짧은 전하수명의 기판을 요구하는데 저온에서 성장한(low-temperature grown : LT) InGaAs는 격자 내에 Gallium 자리에 Arsenic이 치환 하면서 AsGa antisite가 발생하여 전하수명을 짧아지는 것을 응용하여 가장 많이 이용되고 있다. 본 연구에서는 보다 높은 저항을 얻기 위하여 molecular beam epitaxy를 이용하여 semi-insulating InP:Fe 기판위에 격자 정합된 LT-InGaAs:Be/InAlAs multi quantum well (MQW)를 well과 barrier를 가각 $10{\mu}m$ 씩 100주기 성장을 하였고 Ti와 Au를 각각 30, $200{\mu}m$로 dipole antenna를 제작 하였다. 이 때 Ti:sapphire femto-pulse laser (30 fs/90 MHz)를 excitation source로 사용하였을 때 9000 pA로 LT-InGaAs epilayer (180 pA)보다 50배 이상 큰 전류 신호를 얻을 수 있었다. THz 발생과 검출을 초소형, 초경량, 고효율로 하기 위해서는 fiber-optic를 이용해야 하는데 이때 분산과 산란 손실이 가장 적은 1550 nm 대역에서 많은 연구가 이루어 졌다. 780, 1560 nm의 mode-locking laser (90 fs/100 MHz)를 사용하여 현재 많이 이용되고 있는 Ti:sapphire femto-pulse laser와 비교하여 THz 특성 변화를 확인하는 연구를 진행 하고 있다.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.618-618
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• 2013

Graphene is only one atom thick planar sheet of sp2-bonded carbon atoms arranged in a honeycomb crystal lattice, which has flexible and transparent characteristics with extremely high mobility. These noteworthy properties of graphene have given various applicable opportunities as electrode and/or channel for various flexible devices via suitable physical and chemical modifications. In this work, for the development of all-graphene devices, we performed to synthesize alternately patterned structure of mono- and multi-layer graphene by using the patterned Ni film on Cu foil, having much different carbon solid solubilities. Depending on the process temperature, Ni film thickness, introducing occasion of methane and gas ratio of CH4/H2, the thickness and width of the multi-layer graphene were considerably changed, while the formation of monolayer graphene on just Cu foil was not seriously influenced. Based on the alternately patterned structure of mono- and multi-layer graphene as a channel and electrode, respectively, the flexible TFT (thin film transistor) on SiO2/Si substrate was fabricated by simple transfer and O2 plasma etching process, and the I-V characteristics were measured. As comparing the change of resistance for bending radius and the stability for a various number of repeated bending, we could confirm that multi-layer graphene electrode is better than Au/Ti electrode for flexible applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.331-331
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• 2009

Hafnium oxide ($HfO_2$) attracted by one of the potential candidates for the replacement of si-based oxides. For applications of the high-k gate dielectric material, high thermodynamic stability and low interface-trap density are required. Furthermore, the amorphous film structure would be more effective to reduce the leakage current. To search the gate oxide materials, metal-insulator-metal (MIM) capacitors was fabricated by pulsed laser deposition (PLD) on indium tin oxide (ITO) coated glass with different oxygen pressures (30 and 50 mTorr) at room temperature, and they were deposited by Au/Ti metal as the top electrode patterned by conventional photolithography with an area of $3.14\times10^{-4}\;cm^2$. The results of XRD patterns indicate that all films have amorphous phase. Field emission scanning electron microscopy (FE-SEM) images show that the thickness of the $HfO_2$ films is typical 50 nm, and the grain size of the $HfO_2$ films increases as the oxygen pressure increases. The capacitance and leakage current of films were measured by a Agilent 4284A LCR meter and Keithley 4200 semiconductor parameter analyzer, respectively. Capacitance-voltage characteristics show that the capacitance at 1 MHz are 150 and 58 nF, and leakage current density of films indicate $7.8\times10^{-4}$ and $1.6\times10^{-3}\;A/cm^2$ grown at 30 and 50 mTorr, respectively. The optical properties of the $HfO_2$ films were demonstrated by UV-VIS spectrophotometer (Scinco, S-3100) having the wavelength from 190 to 900 nm. Because films show high transmittance (around 85 %), they are suitable as transparent devices.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.4
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• pp.49-53
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• 2011

High-speed Cu filling into a through-silicon-via (TSV) and simplification of bumping process by electroplating for three dimensional stacking of Si dice were investigated. The TSV was prepared on a Si wafer by deep reactive ion etching, and $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. In order to increase the filling rate of Cu into the via, a periodic-pulse-reverse wave current was applied to the Si chip during electroplating. In the bumping process, Sn-3.5Ag bumping was performed on the Cu plugs without lithography process. After electroplating, the cross sections of the vias and appearance of the bumps were observed by using a field emission scanning electron microscope. As a result, voids in the Cu-plugs were produced by via blocking around via opening and at the middle of the via when the vias were plated for 60 min at -9.66 $mA/cm^2$ and -7.71 $mA/cm^2$, respectively. The Cu plug with a void or a defect led to the production of imperfect Sn-Ag bump which was formed on the Cu-plug.