• 조명전기설비학회논문지
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• 제29권7호
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• pp.22-27
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• 2015

In this paper, the problem of voltage unbalancing in series-connected multiple electric double-layer capacitors(EDLCs) is studied. Good understanding of this problem is required in order to increase reliability and stability of an energy storage system comprising EDLCs. Existing methods to settle voltage unbalancing cannot mitigate the problem enough for each cell, since most method have been applied to each module. For equalizing between cells, Zener diode which is one of passive method have been well examined in literature. However, Zener have well not used in balancing due to heating problem. In addition, It is difficult to choose Zener diode fitted rating voltage of EDLC, because of its internal resistance. Thus, we proposed passive balancing using Zener diode by analyzing parasitic element of Zener and EDLC. To experimentally confirm the balancing effect, we compared in two occasions which are with and without passive. As a result, proposed passive balancing circuit mitigated unbalanced voltage gap between EDLCs.

• 한국가스학회지
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• 제8권1호
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• pp.18-24
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• 2004

본 연구에서는 가연성가스가 존재하는 위험지역에서 사용되는 본질안전방폭형 전기기기가 외부로부터 직류전원을 공급받을 때 방폭 성능을 유지하기 위한 부품의 조건을 실험을 통하여 알아보았다. 따라서 제너다이오드의 역방향 특성을 실험하였으며, IEC형 불꽃점화시험기를 사용하여 제너다이오드와 저항으로 구성된 전원부의 점화특성효과를 실험하였다. 이 실험을 통하여 안정화된 전원부에서 사용되는 제너다이오드와 저항의 필요용량 값을 계산하고 본질안전시스템을 유지하기 위한 본질안전방폭형 전원공급방법을 설계하여 제시하였다.

• 한국전기전자재료학회논문지
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• 제28권9호
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• pp.555-560
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• 2015

This paper was proposed 900 V Power MOSFET with ESD protection circuits using zener diodes. And we were carried out and analyzed its electrical characteristics. As a result of designing 900 V power MOSFET, we obtained 1,000 V breakdown voltage, 3.49 V threshold voltage and $0.249{\Omega}{\cdot}cm^2$. And we designed ESD circuits using 2 series zener diode and 4 series zener diodes. After analyzing electrical characteristics, we obtained 26 V forward voltage drop and 47 V breakdown voltage. Therefore, This devices can enoughly use power module, SMPS and Automotive.

• Transactions on Electrical and Electronic Materials
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• 제14권1호
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• pp.47-51
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• 2013

A high power MOSFET switch based on a 0.35 ${\mu}m$ CMOS process has been developed for the protection IC of a rechargeable battery. In this process, a vertical double diffused MOS (VDMOS) using 3 ${\mu}m$-thick epi-taxy layer is integrated with a Zener diode. The p-n+Zener diode is fabricated on top of the VDMOS and used to protect the VDMOS from high voltage switching and electrostatic discharge voltage. A fully integrated digital circuit with power devices has also been developed for a rechargeable battery. The experiment indicates that both breakdown voltage and leakage current depend on the doping concentration of the Zener diode. The dependency of the breakdown voltage on doping concentration is in a trade-off relationship with that of the leakage current. The breakdown voltage is obtained to exceed 14 V and the leakage current is controlled under 0.5 ${\mu}A$. The proposed integrated module with the application of the power MOSFET indicates the high performance of the protection IC, where the overcharge delay time and detection voltage are controlled within 1.1 s and 4.2 V, respectively.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권6호
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• pp.797-801
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• 2014

This research presented the concept of employing the punch-through diode triggered SCRs (PTTSCR) for low voltage ESD applications such as transient voltage suppression (TVS) devices. In order to demonstrate the better electrical properties, various traditional ESD protection devices, including a silicon controlled rectifier (SCR) and Zener diode, were simulated and analyzed by using the TCAD simulation software. The simulation result demonstrates that the novel PTTSCR device has better performance in responding to ESD properties, including DC dynamic resistance and capacitance, compared to SCR and Zener diode. Furthermore, the proposed PTTSCR device has a low reverse leakage current that is below $10^{-12}$ A, a low capacitance of $0.07fF/mm^2$, and low triggering voltage of 8.5 V at $5.6{\times}10^{-5}$ A. The typical properties couple with the holding voltage of 4.8 V, while the novel PTTSCR device is compatible for protecting the low voltage, high speed ESD protection applications. It proves to be good candidates as ultra-low capacitance TVS devices.

• 한국전자통신학회논문지
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• 제17권1호
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• pp.71-76
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• 2022

밝기가 동작 전류에 비례하는 LED 조명은 다수의 LED를 직렬 연결하여 정전류원으로 구동하는 방식을 널리 사용하고 있다. 이러한 방식에서는 일부 LED가 고장으로 개방되면 전류 통로가 끊어져 직렬 연결된 모든 LED가 꺼지게 된다. 본 논문에서는 LED 동작 전압보다 약 0.4V 정도 높은 항복전압을 갖는 제너 다이오드를 개별 LED와 병렬로 연결하여 LED 고장 시 전류 우회로를 확보하므로 이러한 문제점을 해결하는 회로를 설계하였다. 시뮬레이션과 실험을 통해 LED 정상 동작 시에는 제너 다이오드로 전류가 거의 흐리지 않고, LED 고장 시에는 제너 다이오드가 안정적으로 전류 우회로로 동작함을 확인하였다.

• ETRI Journal
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• 제35권4호
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• pp.603-609
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• 2013

In this paper, we present a 600-V reverse conducting insulated gate bipolar transistor (RC-IGBT) for soft and hard switching applications, such as general purpose inverters. The newly developed RC-IGBT uses the deep reactive-ion etching trench technology without the thin wafer process technology. Therefore, a freewheeling diode (FWD) is monolithically integrated in an IGBT chip. The proposed RC-IGBT operates as an IGBT in forward conducting mode and as an FWD in reverse conducting mode. Also, to avoid the destructive failure of the gate oxide under the surge current and abnormal conditions, a protective Zener diode is successfully integrated in the gate electrode without compromising the operation performance of the IGBT.

• 대한전자공학회논문지
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• 제14권4호
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• pp.15-21
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• 1977

본 논문은 Na2CO3전해액내에서의 무성방전의 전기적 특성을 유정하기 위한 방법을 충방전회로로 구성된 등가회로로써 제안하였다. 전기적 등가회로에는 Zener Diode와 Capacitor를 사용하였고 전기적 특성은 oscilloscope상에 전압전하간의 위상이 간단한 편형사변형으로 나타난다. 이 평형사변형의 면적이 매 주기당 방전 수행시의 Energy이면 이것은 인가한 전압의 파형에 무관하고 인가한 전압의 최대치에 관계한다.

• 한국통신학회논문지
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• 제5권1호
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• pp.70-75
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• 1980

本 論文은 2個의 電流미러(Current mirror)로 構成한 電壓制御負抵抗回路를 새롭게 提示하였고, 이 構成된 回路의 動作을 推定하고, 解析하였다. 그리고 回路에서 R과 直列로 Zener Diode를 入하여 Vp를 높이고 外部抵抗을 可變시켜 負抵抗特性을 보았는데 實驗을 通하여, 推定되는 回路動作의 實現과 解析結果에서 얻은 負抵抗測와 實驗値가 大體로 一致함을 確認하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.63-66
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• 2000

In this paper, we propose two new CMOS composite transistors with an improved operating region by reducing a threshold voltage. The proposed composite transistor 1 and 2 employ a P-type folded composite transistor and an electronic zener diode in order to decrease the threshold voltage, respectively. The simulation has been carried oui using 0.25$\mu\textrm{m}$ n-well process with 2.5V supply voltage.