• Journal of the Korean Institute of Telematics and Electronics
• /
• v.25 no.11
• /
• pp.1367-1372
• /
• 1988

In this paper, we have optimized the computation of the CSP - LOC (Channel Substrate Planar-Large Optical Cavity) structure to design the gith power (Ga, Al) As/GaAs CSP-LOC laser diode. The parameters of the device on the bases of experimental datas include the effects of the various layer thickness, material absorption coefficients, stripe width and so forth. At active layer ($d_2$)=0.08 um with optical layer ($d_3$)=0.5 um and $d_2$ = 0.1 um with $d_3$ = 0.4 um, we find the narrower beam divergence and stable high power in the lowest-order mode without the phenomenon of spatial hole burning. The results of theoretical computation show good agreement with experimental measurements made on LPE grown CSP-LOC. Finally, we developed an practical program and the program is applicable to the CSP-LOC lasers with any materials.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.11a
• /
• pp.345-346
• /
• 2008

We have studied an emission spectra of top-emssion organic light-emitting diodes(TEOLED) due to a change of cathode and organic layer thickness. Device structure is Al(100nm)/TPD(xnm)/$Alq_3$(ynm)/LiF(0.5nm)/cathode. And two different types of cathode were used; one is LiF(0.5nm)/Al(25nm) and the other is LiF(0.5nm)/Al(2nm)/Ag(30nm). While a thickness of hole-transport layer of TPD was varied from 35 to 65nm, an emissive layer thickness of $Alq_3$ was varied from 50 to 100nm for two devices. A ratio of those two layer was kept to be about 2:3. Al and Al/Ag double layer cathode devices show that the emission spectra were changed from 490nm to 560nm and from 490nm to 560nm, respectively, when the total organic layer increase. Full width at half maximum was changed from 67nm to 49nm and from 90nm to 35nm as the organic layer thickness increases. All devices show that view angle dependent emission spectra show a blue shift. Blue shift is strong when the organic layer thickness is more than 140nm. Devece with Al/Ag double layer cathode is more vivid.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.02a
• /
• pp.71-71
• /
• 2012

As the critical dimensions of integrated circuits are scaled down, the line width and spacing between the metal interconnects are made smaller. The dielectric film used as insulation between the metal lines contributes to the resistance-capacitance (RC) time constant that governs the device speed. If the RC time delay, cross talk and lowering the power dissipation are to be reduced, the intermetal dielectric (IMD) films should have a low dielectric constant. The introduction of Cu and low-k dielectrics has incrementally improved the situation as compared to the conventional $Al/SiO_2$ technology by reducing both the resistivity and the capacitance between interconnects. Some of the potential candidate materials to be used as an ILD are organic and inorganic precursors such as hydrogensilsequioxane (HSQ), silsesquioxane (SSQ), methylsilsisequioxane (MSQ) and carbon doped silicon oxide (SiOCH), It has been shown that organic functional groups can dramatically decrease dielectric constant by increasing the free volume of films. Recently, various inorganic precursors have been used to prepare the SiOCH films. The k value of the material depends on the number of $CH_3$ groups built into the structure since they lower both polarity and density of the material by steric hindrance, which the replacement of Si-O bonds with Si-$CH_3$ (methyl group) bonds causes bulk porosity due to the formation of nano-sized voids within the silicon oxide matrix. In this talk, we will be introduce some properties of SiOC(-H) thin films deposited with the dimethyldimethoxysilane (DMDMS: $C_4H_{12}O_2Si$) and oxygen as precursors by using plasma-enhanced chemical vapor deposition with and without ultraviolet (UV) irradiation.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.37 no.12
• /
• pp.70-78
• /
• 2000

A novel capacitance deviation-to-time interval converter based on ramp-integration is presented. It consists of two current mirrors, two schmitt triggers, and control digital circuits by the upper and lower sides, symmetrically. Total circuit has been with discrete components. The results show that the proposed converter has a linearity error of less than 1% at the time interval(pulse width) over a capacitance deviation from 295 pF to 375 pF. A capacitance deviation of 40pF and time interval of 0.2 ms was measured for sensor capacitance of 335 pF. Therefore, the high-resolution can be known by counting the fast and stable clock pulses gated into a counter for time interval. The application of a novel capacitance deviation-to time interval converter to a digital humidity controller is also presented. The presented circuit is insensitive to the capacitance difference in disregard of voltage source or temperature deviation. Besides the accuracy, it features the small MOS device count integrable onto a small chip area. The circuit is thus particularly suitable for the on-chip interface.

• Journal of IKEEE
• /
• v.24 no.1
• /
• pp.319-325
• /
• 2020

In this paper, a discontinuous-conduction mode (DCM) DC-DC buck converter is presented for mobile device applications. The buck converter consists of compensator for stable operations, pulse-width modulation (PWM) logic, and power switches. In order to achieve small hardware form-factor, the number of off-chip components should be kept to be minimum, which can be realized with simple and efficient frequency compensation and digital soft start-up circuits. Burst-mode operation is included for preventing the efficiency from degrading under very light load condition. The DCM DC-DC buck converter is fabricated with 0.18-um BCDMOS process. Programmable output with external resistors is typically set to be 1.8V for the input voltage between 2.8 and 5.0V. With a switching frequency of 1MHz, measured maximum efficiency is 92.6% for a load current of 100mA.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2009.10a
• /
• pp.928-930
• /
• 2009

In this paper, the threshold voltage characteristics have been alanyzed using three dimensional Poisson's equation for FinFET. The FinFET is extensively been studing since it can reduce the short channel effects as the nano device. We have presented the short channel effects such as subthreshold swing and threshold voltage for FinFET, using the analytical three dimensional Poisson's equation. We have analyzed for channel length, thickness and width to consider the structural characteristics for FinFET. Using this model, the subthreshold swing and threshold voltage have been analyzed for FinFET since the potential and transport model of this analytical three dimensional Poisson's equation is verified as comparing with those of the numerical three dimensional Poisson's equation.

• Journal of the Korean Society for Marine Environment & Energy
• /
• v.20 no.2
• /
• pp.91-99
• /
• 2017

The parametric study was performed for performance enhancement of wave energy converter(WEC) using a submerged pendulum plate. The wave exciting moment and hydrodynamic moment were obtained by means of eigenfunction expansion method based on the linear potential theory, and then the roll response of a pendulum plate and time averaged extracted power were investigated. The optimal PTO damping coefficient was suggested to give optimal extracted power. The peak value of optimal extracted power occurs at the resonant frequency. The resonant peak and it's width increase, as the height and thickness of a pendulum plate increase. The mooring line installed at the end of the pendulum plate is effective for extracting wave energy because it can not only induce the resonance with the waves of the installation site but also increase the restoring moment in case of PTO-on. The WEC using a rolling pendulum plate suitable for the shallow water acts as breakwater as well as energy extraction device.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.12 no.6
• /
• pp.1009-1017
• /
• 2001

The acousto-optical spectrometer is designed by using 1 GHz bandwidth acousto-optic deflector for radio signal analysis. This system is a high resolution wide band spectrometer which uses I GHz bandwidth and a total of 2,048 channel charge coupled device. When we measured the spectrums of signals deflected by acousto-optical spectrometer, we confirmed the stability of the total system by repetitive observations of the same frequency, and each part of the system worked well. We installed this system onto 60 cm radio telescope, and observed 12CO(J= 1 ∼0) emission lines around CRL 2688, IRC 10216 and NGC 5005 Galaxy center. We could observe effectively very narrow band width radio spectrum as well as wide band radio spectrum. We also confirmed high sensitivity and resolution in observation of 12CO(J-10) omission line of NGC 5005 Galaxy center which is a weak signal.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.19 no.4
• /
• pp.903-908
• /
• 2015

This paper has analyzed threshold voltage shift for doping profile of asymmetric double gate(DG) MOSFET. Ion implantation is usually used in process of doping for semiconductor device and doping profile becomes Gaussian distribution. Gaussian distribution function is changed for projected range and standard projected deviation, and influenced on transport characteristics. Therefore, doping profile in channel of asymmetric DGMOSFET is affected in threshold voltage. Threshold voltage is minimum gate voltage to operate transistor, and defined as top gate voltage when drain current is $0.1{\mu}A$ per unit width. The analytical potential distribution of series form is derived from Poisson's equation to obtain threshold voltage. As a result, threshold voltage is greatly changed by doping profile in high doping range, and the shift of threshold voltage due to projected range and standard projected deviation significantly appears for bottom gate voltage in the region of high doping concentration.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.254.2-254.2
• /
• 2014

The Transmission Fourier Transform Infrared spectroscopy (FTIR) of SiOx charge storage layer with the richest silicon content showed an assignment at peaks around 2000~2300 cm-1. It indicated that the existence of many silicon phases and defect sources in the matrix of the SiOx films. The total hysteresis width is the sum of the flat band voltage shift (${\Delta}VFB$) due to electron and hole charging. At the range voltage sweep of ${\pm}15V$, the ${\Delta}VFB$ values increase of 0.57 V, 1.71 V, and 13.56 V with 1/2, 2/1, and 6/1 samples, respectively. When we increase the gas ratio of SiH4/N2O, a lot of defects appeared in charge storage layer, more electrons and holes are charged and the memory window also increases. The best retention are obtained at sample with the ratio SiH4/N2O=6/1 with 82.31% (3.49V) after 103s and 70.75% after 10 years. The high charge storage in 6/1 device could arise from the large amount of silicon phases and defect sources in the storage material with SiOx material. Therefore, in the programming/erasing (P/E) process, the Si-rich SiOx charge-trapping layer with SiH4/N2O gas flow ratio=6/1 easily grasps electrons and holds them, and hence, increases the P/E speed and the memory window. This is very useful for a trapping layer, especially in the low-voltage operation of non-volatile memory devices.