• ETRI Journal
• /
• v.34 no.6
• /
• pp.885-891
• /
• 2012

This paper proposes a high-efficiency power amplifier (PA) with uneven bias. The proposed amplifier consists of a driver amplifier, power stages of the main amplifier with class AB bias, and an auxiliary amplifier with class C bias. Unlike other CMOS PAs, the amplifier adopts a current-mode transformer-based combiner to reduce the output stage loss and size. As a result, the amplifier can improve the efficiency and reduce the quiescent current. The fully integrated CMOS PA is implemented using the commercial Taiwan Semiconductor Manufacturing Company 0.18-${\mu}m$ RF-CMOS process with a supply voltage of 3.3 V. The measured gain, $P_{1dB}$, and efficiency at $P_{1dB}$ are 29 dB, 28.1 dBm, and 37.9%, respectively. When the PA is tested with 54 Mbps of an 802.11g WLAN orthogonal frequency division multiplexing signal, a 25-dB error vector magnitude compliant output power of 22 dBm and a 21.5% efficiency can be obtained.

• Proceedings of the KIPE Conference
• /
• 1999.07a
• /
• pp.427-430
• /
• 1999

This paper presents a S-FES(Superconducting magnetic bearing Flywheel Energy Storage System) for the purpose of replacing battery used to store the energy. Especially, the design elements of FES, such as the bearing, wheel material, and power converter, etc., is described. The design and manufacturing techniques of the controllable power converter are proposed to generate the sinusoidal output current in the high speed operation and to get the constant DC voltage in the regeneration mode. The cylindrical permanent magnet synchronous motor with halbach array of Nd-Fe-B permanent magnet which is the high coercivity material is used as the driver of FES. The proposed S-FES system shows the stable rotation characteristics at high speed range about 10,000 rpm. To verify the validity of proposed system, the comparative study with the conventional ball bearing system is proceeded and it is well confirmed with the result of the lower friction loss of S-FES system.

• Proceedings of the KIPE Conference
• /
• 2017.07a
• /
• pp.407-408
• /
• 2017

In regenerative mode of an IPMSM control system without a bi-directional DC-DC converter, the 3-phase PWM inverter charges the battery. At this time, the regenerative torque reference for braking must output the proper torque reference to charge the battery. This paper proposed a regeneration control method that controls the voltage and current of the battery through CC-CV control at the regenerative braking torque corresponding to the driver's brake control.

• Proceedings of the KIPE Conference
• /
• 2012.07a
• /
• pp.598-599
• /
• 2012

본 논문은 전압제한 고효율 AC입력 LED 드라이버에 연구에 관한 것이다. 최근 이산화탄소 배출 저감과 고효율 LED 조명이 일반화 되면서 고효율, 장수명, 소형화에 대한 요구가 커지고 있다. LED를 구동하기 위해 SMPS (Switching Mode Power Supply)를 사용하는 경우 역률을 높이기 위해서 별도의 역률 개선부를 포함하고 있어야 하며 전해커패시터 역시 사용되어야 한다. 이 방식은 가격의 상승과 전해커패시터 사용에 의해 수명 저하라는 단점이 있다. 본 연구에서는 이러한 단점을 보완하여 수명 저하를 일으키는 전해커패시터와 별도의 역률 개선부 없이 LED에 정전류를 공급하고 역률을 향상시킬 수 있는 LED 드라이버 회로를 제안하고 이를 실험으로 검증한다.

• Journal of IKEEE
• /
• v.24 no.1
• /
• pp.161-169
• /
• 2020

In order to reduce the manufacturing cost of MCU chips used in applications such as wireless chargers and USB-C, compared to DP-EEPROM (Double Poly EEPROM), which requires 3 to 5 additional process masks, it is even more necessary MTP(Multi-Time Programmable), which is less than one additional mask and have smaller unit cell size. In addition, in order to improve endurance characteristics and data retention characteristics of the MTP memory cell due to E/P(Erase / Program) cycling, the distribution of the V_TP(Program Threshold Voltage) and the V_TE(Erase Threshold Voltage) needs to be narrow. In this paper, we proposed a current-type BL S/A(Bit-Line Sense Amplifier) circuit, WM(Write Mask) circuit, BLD(BL Driver) circuit and a algorithm, which can reduce the distribution of program and V_T and erase V_T, through compare the target current by performing the erase and program pulse of the short pulse several times, and if the current specification is satisfied, the program or erase operation is no longer performed. It was confirmed that the 256Kb MTP memory fabricated in the Magnachip semiconductor 0.13㎛ process operates well on the wafer in accordance with the operation mode.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.17 no.6
• /
• pp.715-720
• /
• 2016

This paper proposes a PWM (Pulse Width Modulation) voltage mode DC-DC step-up converter for portable devices. The converter, which is operated with a 1 MHz switching frequency, is capable of reducing the mounting area of passive devices, such as inductor and capacitor, and is suitable for compact mobile products. This step-up converter consists of a power stage and a control block. The circuit elements of the power stage are an inductor, output capacitor, MOS transistors Meanwhile, control block consist of OPAMP (operational amplifier), BGR (band gap reference), soft-start, hysteresis comparator, and non-overlap driver and some protection circuits (OVP, TSD, UVLO). The hysteresis comparator and non-overlapping drivers reduce the output ripple and the effects of noise to improve safety. The proposed step-up converter was designed and verified in Magnachip/Hynix 0.18um 1-poly, 6-metal CMOS process technology. The output voltage was 5 V with a 3.3 V input voltage, output current of 100 mA, output ripple less than 1% of the output voltage, and a switching frequency of 1 MHz. These designed DC-DC step-up converters could be applied to the Personal Digital Assistants(PDA), cellular Phones, Laptop Computer, etc.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.10 no.6
• /
• pp.558-569
• /
• 2017

In this paper, a 256Kb EEPROM IP aimed at battery applications using a single supply of 1.5V which is embedded into an MCU is designed. In the conventional cross-coupled VPP (boosted voltage) charge pump using a body-potential biasing circuit, cross-coupled PMOS devices of 5V in it can be broken by the junction or gate oxide breakdown due to a high voltage of 8.53V applied to them in exiting the program or erase mode. Since each pumping node is precharged to the input voltage of the pumping stage at the same time that the output node is precharged to VDD in the cross-coupled charge pump, a high voltage of above 5.5V is prevented from being applied to them and thus the breakdown does not occur. Also, all erase, even program, odd program, and all program modes are supported to reduce the times of erasing and programming 256 kilo bits of cells. Furthermore, disturbance test time is also reduced since disturbance is applied to all the 256 kilo bits of EEPROM cells at once in the cell disturb test modes to reduce the cell disturbance testing time. Lastly, a CG driver with a short disable time to meet the cycle time of 40ns in the erase-verify-read mode is newly proposed.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.24 no.4
• /
• pp.1-9
• /
• 2010

An LED driving and control circuit has been developed. The LED driver has a new PWM circuit for current control of LED columns with dimming, current and thermal control, and communication functions. The PWM circuit is composed of two ring oscillator and one counter which can be constructed using basic digital logic components. In addition, it has the functions of remote control mode such as ON, OFF, emergency and power saving modes by the serial communication. The PWM generator and control circuit have been designed and fabricated 0.35[${\mu}m$] Magnachip/Hynix digital IC fabrication process. The LED driving and control board using the developed chip is fabricated and tested successfully.

• ETRI Journal
• /
• v.30 no.4
• /
• pp.526-534
• /
• 2008

This paper presents a fully integrated 0.13 ${\mu}m$ CMOS MB-OFDM UWB transmitter chain (mode 1). The proposed transmitter consists of a low-pass filter, a variable gain amplifier, a voltage-to-current converter, an I/Q up-mixer, a differential-to-single-ended converter, a driver amplifier, and a transmit/receive (T/R) switch. The proposed T/R switch shows an insertion loss of less than 1.5 dB and a Tx/Rx port isolation of more than 27 dB over a 3 GHz to 5 GHz frequency range. All RF/analog circuits have been designed to achieve high linearity and wide bandwidth. The proposed transmitter is implemented using IBM 0.13 ${\mu}m$ CMOS technology. The fabricated transmitter shows a -3 dB bandwidth of 550 MHz at each sub-band center frequency with gain flatness less than 1.5 dB. It also shows a power gain of 0.5 dB, a maximum output power level of 0 dBm, and output IP3 of +9.3 dBm. It consumes a total of 54 mA from a 1.5 V supply.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.16 no.2
• /
• pp.302-312
• /
• 2012

In this paper, small-area and high-reliability design techniques of a 512-bit EEPROM are designed for UHF RFID tag chips. For a small-area technique, there are a WL driver circuit simplifying its decoding logic and a VREF generator using a resistor divider instead of a BGR. The layout size of the designed 512-bit EEPROM IP with MagnaChip's $0.18{\mu}m$ EEPROM is $59.465{\mu}m{\times}366.76{\mu}m$ which is 16.7% smaller than the conventional counterpart. Also, we solve a problem of breaking 5V devices by keeping VDDP voltage constant since a boosted output from a DC-DC converter is made discharge to the common ground VSS instead of VDDP (=3.15V) in getting out of the write mode.