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http://dx.doi.org/10.6109/jkiice.2012.16.2.302

Design of Small-Area and High-Reliability 512-Bit EEPROM IP for UHF RFID Tag Chips  

Lee, Dong-Hoon (창원대학교)
Jin, Liyan (창원대학교)
Jang, Ji-Hye (창원대학교)
Ha, Pan-Bong (창원대학교)
Kim, Young-Hee (창원대학교)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.16, no.2, 2012 , pp. 302-312 More about this Journal
Abstract
In this paper, small-area and high-reliability design techniques of a 512-bit EEPROM are designed for UHF RFID tag chips. For a small-area technique, there are a WL driver circuit simplifying its decoding logic and a VREF generator using a resistor divider instead of a BGR. The layout size of the designed 512-bit EEPROM IP with MagnaChip's $0.18{\mu}m$ EEPROM is $59.465{\mu}m{\times}366.76{\mu}m$ which is 16.7% smaller than the conventional counterpart. Also, we solve a problem of breaking 5V devices by keeping VDDP voltage constant since a boosted output from a DC-DC converter is made discharge to the common ground VSS instead of VDDP (=3.15V) in getting out of the write mode.
Keywords
UHF RFID; tag; EEPROM; small-area; high-reliability;
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Times Cited By KSCI : 2  (Citation Analysis)
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