1 |
S. Kawai, A. Hosogane, S. Kuge, T. Abe, K. Hashimoto, T. Oishi, N. Tsuji, and K. Sakakibara, "An 8kB EEPROM-Emulation Data FLASH Module for Automotive MCU," IEEE International Solid-State Circuits Conference, pp. 508-509, 2008.
|
2 |
G. S. Cho, D. H. Kim, J. H. Jang, J. H. Lee, P. B. Ha, and Y. H. Kim, "Design of a Small-Area, Low-Power, and High-Speed 128-KBit EEPROM IP for Touch-Screen Controllers," Journal of the Korean Institute of Maritime Information and Communication Sciences, vol. 13, no. 12, pp. 2633-2640, 2009.
|
3 |
M. Hatanaka, H. Hidaka, and G. Palumbo, "Value Creation in SOC/MCU Applications by Embedded Non-Volatile Memory Evolutions", Asian Solid-State Circuits Conference, pp. 38-42, Nov. 2007.
|
4 |
A. Conte, G. L. Giudice, and G. Palumbo, "A High-Performance very Low-Voltage Current Sense Amplifier for Nonvolatile Memories," IEEE Journal of Solid-State Circuits, vol. 40, no. 2, pp. 507-514, Feb. 2005.
DOI
|
5 |
J. F. Dickson, "On-Chip High-Voltage Generation in NMOS Integrated Circuits Using an Improved Voltage Multiplier Technique," IEEE Journal of Solid-State Circuits, vol. 11, pp. 374-378, June 1976.
DOI
|
6 |
S. I. Cho, J. S. Heo, K. S. Min, and Y. H. Kim,, "A Boosted Voltage Generator for Low-Voltage DRAMs," Current Applied Physics, volume 3, issue 6, pp. 501-505, Dec. 2003.
DOI
|
7 |
H. Park, R. J. Jin, Y. J. Kang, M. H. Kim, P. B. Ha, and Y. H. Kim, "Design of 512Kb EEPROM IP Using Dual Program Voltage," Proceedings of ICIECT, pp. 176-183, July 2017.
|
8 |
Y. H. Kim, J. K. Nam, S. H. Lee, H. J. Park, J. S. Choi, C. S. Park, S. H. Ahn, and J. Y. Chung, "Two-Phase Boosted Voltage Generator for Low-Voltage Giga-bit DRAMs," IEICE Transactions on Electron., vol. E83-C, pp. 266-269, Feb. 2000.
|
9 |
P. Favrat, "A High-Efficiency CMOS Voltage Doubler," IEEE JSSC, vol. 33, pp. 410-416, Mar. 1998.
|
10 |
H. Park, R. J. Jin, P. B. Ha, and Y. H. Kim, "Design of a Cell Verification Module for Large-Density Memories," KIIECT, vol. 10, no. 2, pp. 176-183, April 2017.
|
11 |
R. J. Jin, H. Park, P. B. Ha, and Y. H. Kim, "Design of High-Speed EEPROM IP Based on a BCD Process," KIIECT, vol. 10, no. 5, pp. 455-461, Oct. 2017.
|
12 |
Y. H. Kim, H. Park, M. H. Park, P. B. Ha, and Y. H. Kim, "Design of a Fast 256Kb EEPROM for MCU", JKIICE, vol. 19, no. 3, pp. 567-574, March 2015.
|