• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.128-133
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• 2008

Phase-change random access memory (PRAM) chip cell phase of amorphous state is rapidly changed to crystal state above 160 Celsius degree within several seconds during Infrared (IR) reflow. Thus, on-board programming method is considered for PRAM chip programming. We demonstrated the functional 512Mb PRAM with 90nm technology using several novel core circuits, such as metal-2 line based global row decoding scheme, PN-diode cells based BL discharge (BLDIS) scheme, and PMOS switch based column decoding scheme. The reverse-state standby current of each PRAM cell is near 10 pA range. The total leak current of 512Mb PRAM chip in standby mode on discharging state can be more than 5 mA. Thus in the proposed BLDIS control, all bitlines (BLs) are in floating state in standby mode, then in active mode, the activated BLs are discharged to low level in the early timing of the active period by the short pulse BLDIS control timing operation. In the conventional sense amplifier, the simultaneous switching activation timing operation invokes the large coupling noise between the VSAREF node and the inner amplification nodes of the sense amplifiers. The coupling noise at VSAREF degrades the sensing voltage margin of the conventional sense amplifier. The merit of the proposed sense amplifier is almost removing the coupling noise at VSAREF from sharing with other sense amplifiers.

• Journal of Korea Society of Industrial Information Systems
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• v.23 no.1
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• pp.43-52
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• 2018

This paper presents the performance of a Phase Shift Full Bridge (PSFB) converter with inductive load and a new current control scheme to improve dynamic response of output current with various inductive loads. Enhanced dynamic model is used which includes leakage inductance and inductive load. Effect of changing of inductive load was analyzed in detail. Proposed current control scheme is designed based on phase margin specifications. As a result, the proposed current control scheme helps to improve the dynamic response in comparison with the existing current control scheme. The performance of the designed controller is verified by a 500 A PSFB converter. The results will be utilized for high current applications with high inductive load such as superconducting devices.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.8
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• pp.27-33
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• 2007

A novel priming discharge technique in which the ramp shaped priming pulse is superposed on the sustain period so that the entire plasma display panel (PDP) is discharged at the same time with a single drive circuit is proposed. From the experimental results, it is ascertained that the priming discharge is ignited only in a pixel in which sustain discharge does not occur and it has been understood that the priming pulse hardly influences the sustain discharge. Moreover, high-speed driving with address pulse widths of 0.7[${\mu}s$] was achieved and a wide address voltage margin of 40[V] was obtained by using the drive method applied the proposed priming discharge technique. In these results, full-HDTV PDP with 1080 horizontal scanning lines can be driven without decreasing the brightness and the possibility of the commercializing is also high because this technology is designed for using the commercialized driver IC.

• Proceedings of the KIEE Conference
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• 2005.11b
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• pp.46-48
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• 2005

This paper discusses a probabilistic method for power system security assessment. The security analysis relates to the ability of the electric power systems to survive sudden disturbances such as electric short circuits or unanticipated loss of system elements. It consists of both steady state and dynamic security analyses, which are not two separate issues but should be considered together. In steady state security analysis including voltage security analysis, the analysis checks that the system is operated within security limits by OPF (optimal power flow) after the transition to a new operating point. Until now, many utilities have difficulty in including dynamic aspects due to computational capabilities. On the other hand. dynamic security analysis is required to ensure that the transition may lead to an acceptable operating condition. Transient stability, which is the ability of power systems to maintain synchronism when subjected to a large disturbance. is a principal component in dynamic security analysis. Usually any loss of synchronism may cause additional outages and make the present steady state analysis of the post-contingency condition inadequate for unstable cases. This is the reason for the need of dynamic studies in power systems. Probabilistic criterion can be used to recognize the probabilistic nature of system components while considering system security. In this approach. we do not have to assign any predetermined margin of safety. A comprehensive conceptual framework for probabilistic static and dynamic assessment is presented in this paper. The simulation results of the Western System Coordinating Council (WSCC) system compare an analytical method with Monte-Carlo simulation (MCS).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.4
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• pp.45-52
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• 2009

We proposed a new pixel circuit and driving method for the large-area, high-luminance AMOLED applications in this study. We designed with the low-temperature poly-silicon(LTPS) thin film transistors(TFTs) that has poor uniformity but stable characteristic. To improve the uniformity of an image, the threshold voltage($V_{TH}$) and the mobility of the TFTs can be compensated together. The proposed method overcomes the previous methods for mobility compensation, and that is profitable for large-area applications. Black data insertion was introduced to improve the characteristics for moving images. AMOLED panel can operate in two compensation mode, so the luminance degradation by mobility compensation can be released. The scan driver for controlling the pixel circuits were optimized, and the compensation mode can be controlled simply by that. Final driving signal has large timing margin, and the panel operates stably. The pixel circuit was designed for 14.1" WXGA top-emission ANGLED panel. The non-uniformity of the designed panel was estimated under 5% for the mobility compensation time of 1us.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.22-29
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• 2006

We demonstrate highly manufacturable Multi-channel Field Effect Transistor (McFET) on bulk Si wafer. McFET shows excellent transistor characteristics, such as $5{\sim}6 times higher drive current than planar MOSFET, ideal subthreshold swing, low drain induced barrier lowering (DIBL) without pocket implantation and negligible body bias dependency, maintaining the same source/drain resistance as that of a planar transistor due to the unique feature of McFET. And suitable threshold voltage ($V_T$) for SRAM operation and high static noise margin (SNM) are achieved by using TiN metal gate electrode.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.45 no.3
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• pp.51-58
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• 2008

This paper is a study of a prevention of power folding controller's thermal degradation. Power folding technology has been applied for many fields such as side rear vision mirror of vehicles, windshield wiper, antenna, power window. These controllers have been comprised with traditional DC moors, Switching electronic devices, and relays. But this methods have a limitation to overcome such problems of product reliability, endurance, noise margins. Therefore on this paper, to detect the movement of motor, sensing motor brush noise on a load sensing part has been used and controlling a precise RC timing control minimizes the thermal deterioration of motor. And using MOS FETs as a electronic switching device increases life-time and liability of control circuit. After testing such circuit and control method, repetition of operating time, cut-off time, wide operation voltage, power noise margin ware increased over eleven-fold.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.16 no.2
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• pp.45-53
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• 2002

This paper presents an algorithm for the appropriate parameter selection of a power system stabilizer and power converters in two-area power systems with a series HVDC links. The method for PSS is one of the classical techniques by allocating properly poly-zero positions to fit as closely as desired the ideal phase lead and by changing the gain to produce a necessary damping torque. Proper parameter of power converters are obtained in order to have sufficient speed and stability margin to cope with changing reference values and disturbances based on the Root-locus technique. The small signal and transient stability studies using the PSS and power converters parameters obtained from these methods show that a natural oscillation frequency of the study case system is adequately damped. The simulation used in the paper was performed by the Power System Toolbox software program based on MATLAB.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.20 no.7
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• pp.14-20
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• 2006

The discharge characteristics for the reset period of sustain pulses of display discharge in address overlapped display driving methode is studied. It has been understood that the display discharge is strongly influenced of not only the wall charge but also the space charge from the experiment result. The first display discharge which comes out exactly after the rest periods strongly depends on the width of the reset period and as for the second display discharge, the dependancy of it is very low. Even if the first display discharge is a little insufficient if the wall charge is accumulated enough, the second display discharge can be stably induced. However, considering the influence of the space charge, it is preferable within the width of $30[{\mu}s}]$ of the reset period. When the rest period is up to $30[{\mu}s}]$, the uniform voltage operation margin of the display discharge of about 12[V] was obtained.

• Journal of electromagnetic engineering and science
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• v.14 no.2
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• pp.61-67
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• 2014

This paper presents a zero-IF CMOS RF receiver, which supports three channel bandwidths of 5/10/40MHz for LTE-Advanced systems. The receiver operates at IMT-band of 2,500 to 2,690MHz. The simulated noise figure of the overall receiver is 1.6 dB at 7MHz (7.5 dB at 7.5 kHz). The receiver is composed of two parts: an RF front-end and a baseband circuit. In the RF front-end, a RF input signal is amplified by a low noise amplifier and $G_m$ with configurable gain steps (41/35/29/23 dB) with optimized noise and linearity performances for a wide dynamic range. The proposed baseband circuit provides a -1 dB cutoff frequency of up to 40MHz using a proposed wideband OP-amp, which has a phase margin of $77^{\circ}$ and an unit-gain bandwidth of 2.04 GHz. The proposed zero-IF CMOS RF receiver has been implemented in $0.13-{\mu}m$ CMOS technology and consumes 116 (for high gain mode)/106 (for low gain mode) mA from a 1.2 V supply voltage. The measurement of a fabricated chip for a 10-MHz 3G LTE input signal with 16-QAM shows more than 8.3 dB of minimum signal-to-noise ratio, while receiving the input channel power from -88 to -12 dBm.