• International Journal of Control, Automation, and Systems
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• v.5 no.2
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• pp.161-169
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• 2007

The PLL equivalent augmented system incorporated with state feedback is proposed in this paper. The optimal value of filter time constant of loop filter in the phase-locked loop control system and the optimal state feedback gain designed by using linear quadratic regulator approach are derived. This approach allows the PLL control system to employ the large value of the phase-frequency gain $K_d$ and voltage control oscillator gain $K_o$. In designing, the structure of phase-locked loop control system will be rearranged to be a phase-locked loop equivalent augmented system by including the structure of loop filter into the process and by considering the voltage control oscillator as an additional integrator. The designed controller consisting of state feedback gain matrix K and integral gain $k_1$ is an optimal controller. The integral gain $k_1$ related to weighting matrices q and R will be an optimal value for assigning the filter time constant of loop filter. The experimental results in controlling the second-order lag pressure process using two types of loop filters show that the system response is fast without steady-state error, the output disturbance effect rejection is fast and the tracking to step changes is good.

• Journal of Advanced Navigation Technology
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• v.28 no.2
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• pp.232-237
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• 2024

In this paper, a broadband double dipole quasi-Yagi antenna using a 4×2 meander line array structure for maintaining 8 dBi gain was studied. The 4×2 meanderline array structure consists of a unit cell in the shape of a meanderline conductor, and it was placed above the second dipole antenna of the double dipole quasi-Yagi antenna. A double dipole quasi-Yagi antenna with generally used multiple strip directors was designed on an FR4 substrate with the same size, and the input reflection coefficient and gain characteristics were compared. Comparison results showed that the impedance frequency bandwidth increased by 6.3% compared to when using the multiple strip directors, the frequency bandwidth with a gain of 8 dBi or more increased by 10.1%, and average gain also slightly increased. The frequency band of the fabricated antenna for a voltage standing wave ratio less than 2 was 1.548-2.846 GHz(59.1%), and gain was measured to be more than 8 dBi in the 1.6-2.8 GHz band.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.2
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• pp.301-306
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• 2005

In this paper, a gain-boosting charge pump(CP) and a latch type voltage controlled oscillato.(VCO) with voltage controlled resistor(VCR) were proposed. The gain-boosting CP achieves good .current matching of less than 11$mu$V voltage difference between 43$mu$V and 32$mu$V in its output range from 0.8V to 2.3V. The VCO with VCR shows good linear characteristics over the range from 1V to 3V. The fabricated VCO exhibits -108dBc/Hz phase noise at a 100kHz and is comparable to that of the integrated LC-tank oscillator. The phase locked loop(PLL) with new circuits was simulated in a 0.35$mu$m CMOS process and showed 150$mu$s locking time.

• Journal of Electrical Engineering and Technology
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• v.12 no.1
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• pp.189-197
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• 2017

This paper elaborates two novel proposed topologies (type-I and type-II) of the high step-up DC-DC converter using switched inductor and voltage multiplier cell. The advantages of these proposed topologies are the less voltage stress on semiconductor devices, low device count, high power conversion efficiency, high switch utilization factor and high diode utilization factor. We analyze the Type-II topologies operating principle and mathematical analysis in detail in continuous conduction mode. High-intensity discharge lamp for the automotive application can use the derived topologies. The proposed converters give better performance when compared to the existing types. Also, it is found that the proposed type-II converter has relatively higher voltage gain compared to the type-I converter. A 40 W, 12 V input voltage and 72 V output voltage has developed for the type-II converter and the performances are validated.

• Proceedings of the KIPE Conference
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• 1998.11a
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• pp.55-59
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• 1998

By this time, Diode Rectifier or SCR has been used to gain DC Voltage for Electrolysis Power. Generally DC Voltage is produced from rectifier shall be transformed before rectifier using step-down transformer to obtain adaptable DC Voltage, rectifier output. In the same way, rectifier using SCR shall obtain output voltage after step-down voltage through transformer and control of the SCR firing angle. Transformer shall be used for this two methods to adjust the voltage. But the size and weight of the transformer are increased in accordance with the increase of capacity, and the hardships are accompanied in workspace or transportation. Besides, only the value of input voltage is possible to be regulated, and the expectation of current control is almost impossible during Electrolysis. This study has conducted Design and Simulation to reduce the size and weight of transformer and to be enable voltage and current control of Electrolysis power through high-speed switching using Inverter, Electronics device.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.7
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• pp.1303-1310
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• 2016

In this paper, electrocardiogram (ECG) analog front end with supply voltage of 0.5V has been designed and verified by measurements of fabricated chip. ECG is composed of instrument amplifier, 6th order gm-C low pass filter and variable gain amplifier. The instrument amplifier is designed to have gain of 34.8dB and the 6th order gm-C low pass filter is designed to obtain the cutoff frequency of 400Hz. The operational transconductance amplifier of the low pass filter utilizes body-driven differential input stage for low voltage operation. The variable gain amplifier is designed to have gain of 6.1~26.4dB. The electrocardiogram analog front end are fabricated in TSMC $0.18{\mu}m$ CMOS process with chip size of $858{\mu}m{\times}580{\mu}m$. Measurements of the fabricated chip is done not to saturate the gain of ECG by changing the external resistor and measured gain of 28.7dB and cutoff frequency of 0.5 - 630Hz are obtained using the supply voltage of 0.5V.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.3
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• pp.141-149
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• 1994

In this paper, we could find optimum quantum sequence(OQS) to minimize the output ripple voltage of the quantum series resonant converter(QSRC). This sequence control is so general that it is irrelevant to the voltage gain so far as it is operating in the continuous conduction mode(CCM). Further more the dynamic range of QSRC is much extended by the optimum quantum sequence control(OQSC). Througuout the time-domain analysis, the solution of steady state and the boundary condition between continuous and discontinuous mode is QSRC is obtained. This feature is verified by simulations and experiments with good agreements.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.206-211
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• 2005

The hearing aids specific operational amplifier described in this paper is a single-supply, low voltage CMOS amplifier. It works on 1.3V single-supply and gets a gain of 82dB. The 0.18${\mu}m$ CMOS process was chosen to reduce the driven voltage as well as the power dissipation.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.517-520
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• 2002

This paper has been studied Operational Amplification Circuit that has high power specification of 90 W is designed. In the input differential amplifier stage, the current source for circuit bias is designed to protect device from high voltage source. the criving state has the voltage gain more than input differential stage. With temperature compensation design, output stage works stable in different to temperature.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.320-321
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• 2018

A non-isolated high voltage gain bidirectional DC-DC converter for battery storage system has been presented in this paper. The topology is composed of boost converter and traditional SEPIC converter. The proposed converter can achieve higher voltage conversion ratio with reduced voltage and current stresses in the switches. In additional, a reduced number of components are included in this topology. The PSIM simulation is carried to validate the analysis and operation of the converter.