• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.233-233
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• 2010

Magnetic random access memory (MRAM), based on magnetic tunnel junction (MTJ) and CMOS, is a prominent candidate among prospective semiconductor memories because it can provide nonvolatility, fast access time, unlimited read/write endurance, low operating voltage and high storage density. The etching of MTJ stack with good properties is one of a key process for the realization of high density MRAM. In order to achieve high quality MTJ stack, the use of CoFeB and IrMn magnetic films as free layers was proposed. In this study, inductively coupled plasma reactive ion etching of CoFeB and IrMn thin films masked with Ti hard mask was investigated in a $Cl_2$/Ar gas mix. The etch rate of CoFeB and IrMn films were examined on varying $Cl_2$ gas concentration. As the $Cl_2$ gas increased, the etch rate monotonously decreased. The effective of etch parameters including coil rf power, dc-bais voltage, and gas pressure on the etch profile of CoFeB and IrMn thin film was explored, At high coil rf power, high dc-bais voltage, low gas pressure, the etching of CoFeB and IrMn displayed better etch profiles. Finally, the clean and vertical etch sidewall of CoFeB and IrMn free layers can be achieved by means of thin Ti hard mask in a $Cl_2$/Ar plasma at the optimized condition.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.213-213
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• 2010

Magnetic random access memory (MRAM), based on magnetic tunnel junction (MTJ) and CMOS, is one of the best semiconductor memories because it can provide nonvolatility, fast access time, unlimited read/write endurance, low operating voltage and high storage density. For the realization of high density MRAM, the etching of MTJ stack with good properties is one of a key process. Recently, there has been great interest in the MTJ stack using MgO as barrier layer for its huge room temperature MR ratio. The use of MgO barrier layer will undoubtedly accelerate the development of MTJ stack for MRAM. In this study, high-density plasma reactive ion etching of MgO films was investigated in an inductively coupled plasma of $Cl_2$/Ar gas mixes. The etch rate, etch selectivity and etch profile of this magnetic film were examined on vary gas concentration. As the $Cl_2$ gas concentration increased, the etch rate of MgO monotonously decreased and etch slop was slanted. The effective of etch parameters including coil rf power, dc-bais voltage, and gas pressure on the etch profile of MgO thin film was explored, At high coil rf power, high dc-bais voltage, low gas pressure, the etching of MgO displayed better etch profiles. Finally, the clean and vertical etch sidewall of MgO films was achieved using $Cl_2$/Ar plasma at the optimized etch conditions.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.1
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• pp.65-73
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• 1986

Experiment have been conducted about thin oxide characteristics according to O2/N2 ratio needed for EEPROM cell fabrication. As a result, we think that there is no problem even if we grow oxide layer with large O2/N2 ratio and short exidation time and when the water is implated by As before oxidation, the oxide breakdown field is about IMV/cm lower than that is not implanted. Especially, the thin oxide characteristic seems to be affected largely by wafer cleaning and oxidation in air. On the basis of these, tunnel type EEPROM cell is fabricated by 3um CMOS process and its characteristic is studied. Tunnel oxide thickness(100\ulcorner is chosen to allow Fowler-Nordheim tunneling to charge the floating gate at the desired programming voltage and tunnel area(2x2um\ulcorneris chosen to increase capacitive coupling ratio. For program operation, high voltage (20-22V) is applied to the control gate, while both drain and source are gdrounded. The drain voltage for erase is 16V. It is shown that charge retention characteristics is not limited by leakage in the oxide and program/erase endurance is over 10E4 cycles of program erase operation.

• Journal of IKEEE
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• v.24 no.1
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• pp.161-169
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• 2020

In order to reduce the manufacturing cost of MCU chips used in applications such as wireless chargers and USB-C, compared to DP-EEPROM (Double Poly EEPROM), which requires 3 to 5 additional process masks, it is even more necessary MTP(Multi-Time Programmable), which is less than one additional mask and have smaller unit cell size. In addition, in order to improve endurance characteristics and data retention characteristics of the MTP memory cell due to E/P(Erase / Program) cycling, the distribution of the V_TP(Program Threshold Voltage) and the V_TE(Erase Threshold Voltage) needs to be narrow. In this paper, we proposed a current-type BL S/A(Bit-Line Sense Amplifier) circuit, WM(Write Mask) circuit, BLD(BL Driver) circuit and a algorithm, which can reduce the distribution of program and V_T and erase V_T, through compare the target current by performing the erase and program pulse of the short pulse several times, and if the current specification is satisfied, the program or erase operation is no longer performed. It was confirmed that the 256Kb MTP memory fabricated in the Magnachip semiconductor 0.13㎛ process operates well on the wafer in accordance with the operation mode.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.5
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• pp.268-273
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• 2016

In this study, we observed current-voltage characteristics of the MIM (metal-insulator-metal) structure. The $WO_x$ material was used between metal electrodes as the oxide insulator. The structure of the $Al/WO_x/TiN$ shows bipolar resistive switching and the operating direction of the resistive switching is clockwise, which means set at negative voltage and reset at positive voltage. The set process from HRS (high resistance state) to LRS (low resistance state) occurred at -2.6V. The reset process from LRS to HRS occurred at 2.78V. The on/off current ratio was about 10 and resistive switching was performed for 5 cycles in the endurance characteristics. With consecutive switching cycles, the stable $V_{set}$ and $V_{reset}$ were observed. The electrical transport mechanism of the device was based on the migration of oxygen ions and the current-voltage curve is following (Ohm's Law ${\rightarrow}$ Trap-Controlled Space Charge Limited Current ${\rightarrow}$ Ohm's Law) process in the positive voltage region.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.336-337
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• 2005

ZnO varistor ceramics were fabricated as a function of the amount of $Y_2O_3$ addition and sintered at $1250^{\circ}C$ for 2 hour. The average grain size was decreased from 14.2 ${\mu}m$ to 8.3 ${\mu}m$ with the amount of $Y_2O_3$ addition, and varistor voltage was increased from 433 V to 563 V with $Y_2O_3$ addition. Nonlinear coefficient a of all specimens were increased with the amount of $Y_2O_3$ more than 67, in case of $Y_2O_3$ 0.01wt% addition showed the excellent results of 87. And leakage current was less than $1{\mu}A$ at 82% of varistor voltage. The clamping voltage ratio of the specimens added 0.01wt% $Y_2O_3$ was 1.41 at 25A [8/20${\mu}s$]. At the specimen 0.01wt% $Y_2O_3$ addition. endurance of surge current and deviation of varistor voltage were 5700A/$cm^2$ and $\Delta$-2.86%, respectively.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.10a
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• pp.794-797
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• 2005

The automatic load transfer switch (ALTS), a kind of electric power switch, typically automatically transfers electrical loads from a normal electrical power source to an emergency electrical power source upon reduction or loss of normal power source voltage. It can also automatically re-transfer the load to the normal power source when the normal voltage has been restored within acceptable limits. The transfer operation of ALTS is accomplished by a spring-driven linkage mechanism. In order to control or delay the transfer switching time, the ALTS studied in this paper uses the superposed leaf springs, which are subjected to impact leadings in contacting with electrical contacts. Therefore, to confirm whether the springs has enough mechanical endurance in ALTS, we build a finite element model of the superposed lear springs using LS-DYNA and perform the impact and fatigue analysis.

• Journal of the Korean Ceramic Society
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• v.36 no.10
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• pp.1035-1039
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• 1999

Ferroelectric properties and reliability characteristics of(111) and (100) preferentially oriented tetragonal Pb(Zr0.2Ti0.8)O3 (PZT) thin film capacitors have been investigated as a function of the top electrode thickness. The (111) preferentially oriented film exhibits 180$^{\circ}$domain switching process with better squareness of hysterisis loop and abrupt change of small singal capacitance-voltage comparing to the (100) preferentially oriented film having 90$^{\circ}$ domain switching process. The domain swithcing process of tetragonal phase PZT is different from that of rhobohedral phase. The film with thinner top electrode shows less initial switching polarization due to less compressive stress but it exhibits better endurance characteristics due to enhancing partial switching region.

• Journal of Industrial Technology
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• v.24 no.A
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• pp.83-90
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• 2004

Generally, electronic appliances are used on the basis of normal power source supply. The power source inevitably includes the abnormal condition, such as, sudden voltage sagging, power interrupt, and induced noises. As the electronic appliances which include micro-controller-based circuits are being increased recently, the controller circuit sometimes malfunctions by the abnormal condition of the power source. This situation causes serious problems such as hitch of electric appliance, fire and medical instrument glitch, which produces serious situations. In this paper, development of power interrupt tester which is highly suitable for an endurance test device under abnormal power source to microprocessor-based circuits is proposed 89C2051 microcontroller is performed to make power interrupt signal, and software controls peripheral hardwares and built-in functions. Experimental results of this study will offer a good application to electronic appliance maker as a test device of hardware and software debugging use.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.88-90
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• 2003

We reported an AC PDP structure with grooved front panel dielectric layer. The structure exhibits low breakdown voltage, better luminance, and better endurance to crosstalk in high Xe contents. It also shows less luminous efficacy then conventional structure because of the thinner dielectric layer, but we can apply the higher Xe contents to the grooved dielectric structure, which results in the higher luminous efficacy. We made experiments with the Xe contents from 4 to16% and total gas pressure from 400 to 600Torr. The grooved dielectric structure shows the improvement of 20% luminous efficacy and 17% luminance. The firing voltages lower about 40V at 600Torr and Xe 12, 16%. The discharge characteristics of grooved dielectric structure are verified also with 2D simulation.