• Proceedings of the Korean Society of Precision Engineering Conference
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• 2000.11a
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• pp.233-238
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• 2000

CNC machine tool is assembled by central processor, PLC(Programmable Logic Controller), and actuator. The sequential control of machine generally controlled by a PLC. The main fault occured at PLC in 3 control parts. In LC faults, operational fault is charged over 70%. This paper describes diagnosis model and data processing for remote monitoring and diagnosis system in machine tools with open architecture controller. Two diagnostic models based on the ladder diagram. Logical Diagnosis Model(LDM), Sequential Diagnosis Model(SDM), are proposed. Data processing structure is proposed ST(Structured Text) based on IEC1131-3. The faults from CNC are received message form open architecture controller and faults from PLC are gathered by sequential data.. To do this, CNC and PLC's logical and sequential data is constructed database.

• The Transactions of the Korea Information Processing Society
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• v.7 no.4
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• pp.1103-1111
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• 2000

The hyper-geometric distribution software reliability growth model (HGDM) usually assumes that all the software faults detected are perfectly removed without introducing new faults. However, since new faults can be introduced during the test-and-debug phase, the perfect debugging assumption should be relaxed. In this context, Hou, Kuo and Chang [7] developed a modified HGDM for imperfect debugging environment, assuming tat the learning factor is constant. In this paper we extend the existing imperfect debugging HGDM for tow respects: introduction of random sensitivity factor and allowance of variable learning factor. Then the statistical characteristics of he suggested model are studied and its applications to two real data sets are demonstrated.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.6
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• pp.199-208
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• 1994

This paper proposes a delay fault test technique for ICs and PCBs with the boundary-scan architectures supporting ANSI/IEEE Std 1149.1-1990. The hybrid delay fault model, which comprises both of gate delay faults and path delay faults, is selected. We developed a procedure for testing delay faults in the circuits with typical boundary scan cells supporting the standard. Analyzing it,we concluded that it is impractical because the test clock must be 2.5 times faster than the system clock with the cell architect-ures following up the state transition of the TAP controller and test instruction set. We modified the boundary-scan cell and developed test instructions and the test procedure. The modified cell and the procedure need test clock two times slower than the system clock and support the ANSI/IEEE standard perfectly. A 4-bit ALU is selected for the circuits under test. and delay tests are simulated by the SILOS simulator. The simulation results ascertain the accurate operation and effectiveeness of the modified mechanism.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.4
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• pp.36-41
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• 2014

Most faults that occur on transmission lines are caused by extreme weather with lightning storms in the distance. These are not only prolongs the time of removing and recovering, but also increases economical damages. If faults can be precisely located, maintenance crews can reach them quickly, and remove the faults in time. So, the precise locating of the faulted point on a transmission line is very important to improve the system reliability, and decreases economic damages as an inherent consequence of long term outages. Also, fault location methods are becoming of much importance for utilities and research. In this paper, two single-terminal impedance-based fault location techniques will be investigated to show the reliability and evaluated the performance of reactance and Takagi method by using MATHCAD program simulations.

• ETRI Journal
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• v.31 no.2
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• pp.209-214
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• 2009

In this paper, we propose a novel test methodology for the detection of catastrophic and parametric faults present in analog very large scale integration circuits. An automatic test pattern generation algorithm is proposed to generate piece-wise linear (PWL) stimulus using wavelets and a genetic algorithm. The PWL stimulus generated by the test algorithm is used as a test stimulus to the circuit under test. Faults are injected to the circuit under test and the wavelet coefficients obtained from the output response of the circuit. These coefficients are used to train the neural network for fault detection. The proposed method is validated with two IEEE benchmark circuits, namely, an operational amplifier and a state variable filter. This method gives 100% fault coverage for both catastrophic and parametric faults in these circuits.

• International Journal of Control, Automation, and Systems
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• v.5 no.3
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• pp.329-336
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• 2007

This paper considers a fault accommodation problem for inertial navigation systems (INS) that have redundant inertial sensors such as gyroscopes and accelerometers. It is wellknown that the more sensors are used, the smaller the navigation error of INS is, which means that the error covariance of the position estimate becomes less. Thus, when it is decided that double faults occur in the inertial sensors due to fault detection and isolation (FDI), it is necessary to decide whether the faulty sensors should be excluded or not. A new accommodation rule for double faults is proposed based on the error covariance of triad-solution of redundant inertial sensors, which is related to the navigation accuracy of INS. The proposed accommodation rule provides decision rules to determine which sensors should be excluded among faulty sensors. Monte Carlo simulation is performed for dodecahedron configuration, in which case the proposed accommodation rule can be drawn in the decision space of the two-dimensional Cartesian coordinate system.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.14 no.7
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• pp.560-566
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• 2002

The fault detection and diagnosis technology may be applied in order to decrease the energy consumption and the maintenance cost of the air-conditioning system. In this study, two different types of faults in the air-conditioning system, such as the condenser fouling and the evaporator fan slowdown, were considered. The neural network algorithm combined with data preprocessor was developed and applied to detect the faults of the real system. Test results show that this method is very effective to detect the faults in the air-conditioning system. Therefore, this developed method can be used for the development of the air-conditioner fault detection system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.1
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• pp.100-105
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• 2003

In this paper, we propose the novel test method effectively to detect short and open faults in CMOS op-amp. The proposed method uses a sinusoidal signal with higher frequency than unit gain bandwidth. Since the proposed test method doesn't need complex algorithm to generate test pattern, the time of test pattern generation is short, and test cost is reduced because a single test pattern is able to detect all target faults. To verify the proposed method, CMOS two-stage operational amplifier with short and open faults is designed and the simulation results of HSPICE for the circuit have shown that the proposed test method can detect short and open faults in CMOS op-amp.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.10
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• pp.983-990
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• 2008

This paper presents the fault detection and diagnosis(FDD) algorithm to enhance reliability of a longitudinal controller for an autonomous All-Terrain Vehicle(ATV). The FDD is designed to monitor and identify faults which may occur in distributed hardware used for longitudinal control, e.g., DSPs, CAN, sensors, and actuators. The proposed FDD is an integrated approach of decentralized and centralized FDD. While the former is processed in a DSP and suitable to detect faults in a single hardware, it is sensitive to noise and disturbance. On the other hand, the latter is performed via communication and it detects and diagnoses faults through analyzing concurrent performances of multiple hardware modules, but it is limited to isolate faults specifically in terms of components in the single hardware. To compensate for disadvantages of each FDD approach, two layered structure including both decentralized and centralized FDD is proposed and it allows us to make more robust fault detection and more specific fault isolation. The effectiveness of the proposed method will be validated experimentally.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.17 no.8
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• pp.780-788
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• 2005

Two different types of algorithms were developed and applied to detect the partial faults of a multi-type air conditioning system. Partial faults include the compressor valve leakage, the refrigerant pipe partial blockage, the condenser fouling, and the evaporator fouling. The first algorithm was developed by using mathematical models and parity relations, and the second algorithm was developed by using mathematical models and a RBF neural network. Test results showed that the second algorithm was better than the first algorithm in detecting various partial faults of the system. Therefore, the algorithm developed by using mathematical models and a RBF neural network may be used for the detection of partial faults of an air-conditioning system.